MAX6850 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX6850

4-Wire Interfaced, 7-, 14-, and 16-Segment Alphanumeric Vacuum-Fluorescent Display Controller

Maxim Integrated 

4-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-

numeric Vacuum-Fluorescent Display Controller

Typical Operating Characteristics (continued)

(Typical Operating Circuit, V+ = 3.3V, TA = +25°C, unless otherwise noted.)

fOSC vs. TEMPERATURE

2.5

V+ = 2.7V

2.0

V+ = 3.3V

1.5

V+ = 3.6V

1.0

0.5

0

-40 -25 -10 5 20 35 50 65 80 95 110 125

TEMPERATURE (°C)

DEAD-CLOCK OSC FREQUENCY

vs. TEMPERATURE

0.18

0.16

0.14

0.12

V+ = 3.6V

0.10

0.08

V+ = 3.3V

0.06

V+ = 2.7V

0.04

0.02

0

-40 -25 -10 5 20 35 50 65 80 95 110 125

TEMPERATURE (°C)

Pin Description

PIN

NAME

FUNCTION

1

VFCLK

Serial-Clock Output to External Driver. Push-pull clock output to external display driver. On VFCLK’s

falling edge, data is clocked out of VFDOUT.

2

VFDOUT Serial-Data Output to External Driver. Push-pull data output to external display driver.

3

VFLOAD

Serial-Load Output to External Driver. Push-pull load output to external display driver. Rising edge is

used by external display driver to load serial data into display latch.

4

VFBLANK Display Blanking Output to External Driver. Push-pull blanking output to external display driver used for

PWM intensity control.

5

PUMP

Charge-Pump Output and General-Purpose Output. User-configurable push-pull logic output can also

be used as a driver for external charge pump.

6

PHASE1

Filament Drive PHASE1 Output and General-Purpose Output. User-configurable push-pull logic output

can also be used as a driver for external filament bridge drive.

7

PHASE2 Filament Drive PHASE2 Output and General-Purpose Output. User-configurable push-pull logic output

can also be used as a driver for external filament bridge drive.

8

V+

Positive Supply Voltage. Bypass V+ to GND with a 0.1µF ceramic capacitor.

9

GND

Ground

10

PORT0 PORT0 General-Purpose Output. User-configurable push-pull logic output.

11

SCLK

Serial-Clock Input. On SCLK’s rising edge, data shifts into the internal shift register, and data is

clocked out of DOUT. SCLK is active only while CS is low.

12

DIN

Serial-Data Input. Data from DIN loads into the internal 16-bit shift register on SCLK’s rising edge.

13

CS

Chip-Select Input. Serial data is loaded into the shift register while CS is low. The most recent 16 bits of

data latch on CS’s rising edge.

14

PORT1 PORT1 General-Purpose Output. User-configurable push-pull logic output.

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