MAX5940AESA Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza

componentes Descripción

Fabricante

MAX5940AESA

IEEE 802.3af PD Interface Controller For Power-Over-Ethernet

Maxim Integrated 

IEEE 802.3af PD Interface Controller

For Power-Over-Ethernet

GND

UVLO

2.46V

REF

GND

R1

R2

R3

(UVLO)

20%

VGATE

EN

200mV

GATE

EN

6.8V

CLASSIFICATION

RCLASS

MAX5940B

MAX5940D

(PGOOD)

Q4

1.2V, REF

5V, REF

PGOOD

Q3

OUT

Q2

Q1

( ) MAX5940B.

VEE

Figure 2. Block Diagram

To adjust the UVLO threshold (MAX5940B/MAX5940D

only), connect an external resistor-divider from GND to

UVLO and from UVLO to VEE. Use the following equations

to calculate R1 and R2 for a desired UVLO threshold:

R2 = 25.5kΩ x VREF,UVLO

VIN,EX

R1 = 25.5kΩ - R2

where VIN,EX is the desired UVLO threshold. Since the

resistor-divider replaces the 25.5kΩ PD detection resis-

tor, ensure that the sum of R1 and R2 equals 25.5kΩ

±1%. When using the external resistor-divider, the

MAX5940B/MAX5940D has an external reference volt-

age hysteresis of 20% (typ). When UVLO is pro-

grammed externally, the turn-off threshold is 80% (typ)

of the new UVLO threshold.

VIN = 12V TO 67V

GND

R1

UVLO

MAX5940B

MAX5940D

R2

VEE

Figure 3. Setting Undervoltage Lockout with an External

Resistor-Divider

8 _______________________________________________________________________________________

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