M27C1024-45B3X Ver la hoja de datos (PDF) - STMicroelectronics
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M27C1024-45B3X Datasheet PDF : 16 Pages
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M27C1024
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
Min
Max
Unit
ILI
Input Leakage Current
0V ≤ VIN ≤ VCC
±10
µA
ILO Output Leakage Current
0V ≤ VOUT ≤ VCC
±10
µA
ICC Supply Current
E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz
35
mA
ICC1 Supply Current (Standby) TTL
E = VIH
1
mA
ICC2 Supply Current (Standby) CMOS
E > VCC – 0.2V
100
µA
IPP Program Current
VPP = VCC
100
µA
VIL Input Low Voltage
–0.3
0.8
V
VIH (2) Input High Voltage
2
VCC + 1
V
VOL Output Low Voltage
IOL = 2.1mA
0.4
V
Output High Voltage TTL
VOH
Output High Voltage CMOS
IOH = –400µA
2.4
V
IOH = –100µA
VCC – 0.7V
V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
Table 8. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
M27C1024
Symbol Alt
Parameter
Test Condition -35 (3)
-45 (3)
-55 (3) Unit
Min Max Min Max Min Max
tAVQV tACC Address Valid to Output Valid
E = VIL, G = VIL
35
45
55 ns
tELQV tCE Chip Enable Low to Output Valid
G = VIL
35
45
55 ns
tGLQV tOE Output Enable Low to Output Valid
E = VIL
20
25
30 ns
tEHQZ (2) tDF Chip Enable High to Output Hi-Z
G = VIL
0 20 0 30 0 30 ns
tGHQZ (2) tDF Output Enable High to Output Hi-Z
E = VIL
0 15 0 30 0 30 ns
tAXQX
tOH
Address Transition to Output
Transition
E = VIL, G = VIL 0
0
0
ns
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
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