EM25LV512-33MS Ver la hoja de datos (PDF) - ELAN Microelectronics

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EM25LV512-33MS

512 K (64K x 8) Bits Serial Flash Memory

ELAN Microelectronics 

EM25LV512

512 K (64K x 8) Bits Serial Flash Memory

SPECIFICATION

Memory Organization

The memory is organized as:

65,536 Bytes (8 bits per byte)

2 Blocks (256K bits or 32,768 bytes per block)

256 Pages (256 bytes per page)

Each page can be individually programmed (bits are programmed from “1” to “0”). The

device is Block or Chip Erasable (bits are erased from “0” to “1”), but not Page Erasable.

Block

1

0

Address Range

8000h

FFFFh

0000h

7FFFh

Table 2: Memory Organization

Hold#

W#

S#

C

D

Q

Control Logic

I/O Buffer and Data Latches

Address Register

and Counter

256 Byte Data Buffer

FFFFh

Status

Register

Block1

8000h

7FFFh

Block0

0000h

00FFh

256 Bytes (Page Size)

Y-Decoder

Size of the

read-only

memory area

Figure 2: SPI Modes Supported

This specification is subject to change without further notice. (11.08.2004 V1.0)

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