27C1610-10 Ver la hoja de datos (PDF) - Macronix International
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27C1610-10 Datasheet PDF : 19 Pages
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MX27C1610
SYSTEM CONSIDERATIONS
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and falling edges of Chip Enable. The magnitude of
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1 uF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
Vcc and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on One Time
Programmable Read Only Memory arrays, a 4.7 uF
bulk electrolytic capacitor should be used between VCC
and GND for each eight devices. The location of the
capacitor should be close to where the power supply is
connected to the array.
WRITE OPERATIONS
Commands are written to the COMMAND INTERFACE
REGISTER (CIR) using standard microprocessor write
timings. The CIR serves as the interface between the
microprocessor and the internal chip operation. The
CIR can decipher Read Array, Read Silicon ID and Pro-
gram command. In the event of a read command, the
CIR simply points the read path at either the array or
the silicon ID, depending on the specific read command
given. For a program cycle, the CIR informs the write
state machine, and the write state machine and the write
state machine will control the program sequences and
the CIR will only respond to status reads. After the
write state machine has completed its task, it will allow
the CIR to respond to its full command set. The CIR
stays at read status register mode until the microproc-
essor issues another valid command sequence.
Device operations are selected by writing commands
into the CIR. See command definition table below.
MODE SELECT TABLE
MODE
Read (Word) (2)
Read (Upper Byte) (2)
Read (Lower Byte) (2)
Output Disable (2)
Standby (2)
Write Operation (2)
ManufacturerID(3)(1)
Device ID(3)(1)
CE
OE
A9
VIL
VIL
X
VIL
VIL
X
VIL
VIL
X
VIL
VIH
X
VIH
X
X
VIL
VIH
X
VIL
VIL
VH
VIL
VIL
VH
BYTE/
A0
Q15/A-1 VPP(5) Q8-14
Q0-7
X
Q15 Out VIH
Q8-14 Out Q0-7 Out
X
VIH
VIL
High Z
Q8-15 Out
X
VIL
VIL
High Z
Q0-7 Out
X
High Z
X
High Z
High Z
X
High Z
X
High Z
High Z
X
Q15 In
VPP
Q8-14 In
Q0-7 In
VIL
0B
VIH
00H
C2H
VIH
0B
VIH
00H
6AH
NOTES:
1. VH = 10V ± 0.5V
2. X Either VIL or VIH.
3. A1= VIL, other address lines not specified are at "X" states
4. See DC Programming Characteristics for VPP voltages.
5. BYTE/VPP is intended for operation under DC Voltage conditions only. VPP=10V± 0.5V for write operation
P/N:PM0593
REV. 1.4, NOV. 19, 2002
3
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