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VSC9110SA Ver la hoja de datos (PDF) - Vitesse Semiconductor

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VSC9110SA
Vitesse
Vitesse Semiconductor Vitesse
VSC9110SA Datasheet PDF : 24 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
STS-48 Physical Layer
ATM UNI/NNI Device
Data Sheet
VSC9110
Functional Overview
The VSC9110 is a SONET/SDH to ATM framing device that can be used in equipment interconnecting
ATM switches over public or private SONET/SDH networks. When used in conjunction with a high-speed
mux/demux transceiver, the device provides a complete physical layer solution for ATM over SONET/SDH at
the STS-48/STM-16 rate. By using this device, highly integrated OC-48 single line card solutions can be devel-
oped. The basic features of the receive and transmit datapaths along with features of other interfaces are listed
below.
Line Interface (LIF)
• A parity bit, programmable for even/odd parity, is provided each for the incoming and outgoing datapaths.
• A reference clock output derived from the receive clock input can be programmed to be 8kHz, 19MHz,
38MHz, or 78MHz frequency locked to the receive clock.
• A reference clock output derived from the transmit clock input can be programmed to be 8kHz, 19MHz,
38MHz, or 78MHz frequency locked to the transmit clock.
• A Loss of Optical Carrier (LOPC) input signal is provided for monitoring and alarm purposes.
Receive Section Overhead Processor (RSOP)
• 12/24/48-bit A1/A2 framing patterns are supported.
• Out Of Frame (OOF) and Loss Of Frame (LOF) alarm condition are detected.
• The incoming data stream is optionally descrambled using the generating polynomial 1 + x6 + x7 with a
sequence length of 127.
• Section BIP-8 (B1) errors are detected and accumulated. Both individual and block mode accumulation
of B1 error indications are supported.
• The incoming data stream, before descrambling, is monitored for absence of transitions or “all-zero pat-
terns”. The Loss Of Signal (LOS) detection and termination criterias are programmable.
• It is possible to force insertion of all “1” in the data stream, except for the Section overhead. The Line
AIS (AIS-L) condition may be automatically inserted in case of LOS, LOF, or Loss of Optical Carrier
(LOPC) alarm events.
Receive Line Overhead Processor (RLOP)
• The Line Remote Defect Indication (RDI-L) and Line Alarm Indication Signal (AIS-L) alarms carried in
the K2 byte are extracted and filtered. The filter constants are programmable.
• Line BIP-384 errors carried in the B2 bytes are detected and accumulated. Both individual and block
mode accumulation of B2 errors are supported.
• Line REI error indications carried in the M1 byte are accumulated. Both individual and block mode accu-
mulation of M1 error indications are supported.
• The Synchronization Status carried in the S1 byte is extracted and filtered. Unstable and mismatch alarms
are supported. The filter constants are programmable.
Page 2
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52198-0, Rev. 4.2
1/8/00

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