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TSC80251G2D Ver la hoja de datos (PDF) - Temic Semiconductors

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TSC80251G2D Datasheet PDF : 63 Pages
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TSC80251G2D
Signal
Name
P1.0:7
P2.0:7
P3.0:7
PROG#
PSEN#
RD#
RST
RXD
SCL
SCK
SDA
SS#
T1:0
T2
T2EX
TXD
VDD
VPP
Type
I/O
I/O
I/O
I
O
O
I
I/O
I/O
I/O
I/O
I
I/O
I/O
I
O
PWR
I
Description
Alternate
Function
Port 1
P1 is an 8-bit bidirectional I/O port with internal pull-ups. P1 provides interrupt capability
for a keyboard interface.
Port 2
P2 is an 8-bit bidirectional I/O port with internal pull-ups.
A15:8
Port 3
P3 is an 8-bit bidirectional I/O port with internal pull-ups.
Programming Pulse input
The programming pulse is applied to this input for programming the on-chip EPROM/
OTPROM.
Program Store Enable/Read signal output
PSEN# is asserted for a memory address range that depends on bits RD0 and RD1 in
UCONFIG0 byte (see Table 13, Page 15).
Read or 17th Address Bit (A16)
P3.7
Read signal output to external data memory depending on the values of bits RD0 and RD1
in UCONFIG0 byte (see Table 13, Page 15).
Reset input to the chip
Holding this pin high for 64 oscillator periods while the oscillator is running resets the device.
The Port pins are driven to their reset conditions when a voltage greater than VIH1 is applied,
whether or not the oscillator is running.
This pin has an internal pull-down resistor which allows the device to be reset by connecting
a capacitor between this pin and VDD.
Asserting RST when the chip is in Idle mode or Power-Down mode returns the chip to normal
operation.
Receive Serial Data
P3.0
RXD sends and receives data in serial I/O mode 0 and receives data in serial I/O modes 1,
2 and 3.
I2C Serial Clock
P1.6
When I2C controller is in master mode, SCL outputs the serial clock to slave peripherals.
When I2C controller is in slave mode, SCL receives clock from the master controller.
SPI Serial Clock
P1.6
When SPI is in master mode, SCK outputs clock to the slave peripheral. When SPI is in
slave mode, SCK receives clock from the master controller.
I2C Serial Data
P1.7
SDA is the bidirectional I2C data line.
SPI Slave Select Input
P1.4
When in Slave mode, SS# enables the slave mode.
Timer 1:0 External Clock Inputs
When timer 1:0 operates as a counter, a falling edge on the T1:0 pin increments the count.
Timer 2 Clock Input/Output
P1.0
For the timer 2 capture mode, T2 is the external clock input. For the Timer 2 clock-out mode,
T2 is the clock output.
Timer 2 External Input
P1.1
In timer 2 capture mode, a falling edge initiates a capture of the timer 2 registers. In auto-
reload mode, a falling edge causes the timer 2 register to be reloaded. In the up-down counter
mode, this signal determines the count direction: 1= up, 0= down.
Transmit Serial Data
P3.1
TXD outputs the shift clock in serial I/O mode 0 and transmits data in serial I/O modes 1,
2 and 3.
Digital Supply Voltage
Connect this pin to +5V or +3V supply voltage.
Programming Supply Voltage
The programming supply voltage is applied to this input for programming the on-chip EPROM/
OTPROM.
Rev. A - May 7, 1999
7

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