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TSC101(2007) Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza
componentes Descripción
Fabricante
TSC101
(Rev.:2007)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TSC101 Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Electrical characteristics
3
Electrical characteristics
TSC101
Table 4.
Symbol
Supply(1)
Parameter
Test conditions
Min. Typ. Max. Unit
ICC Total supply current
Vsense=0V
Tmin < Tamb < Tmax
165 300
µA
1. Unless otherwise specified, the test conditions are Tamb=25°C, VCC=12V, Vsense=Vp-Vm=50mV, Vm=12V, no load on Out.
Table 5. Input(1)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
CMR
Common mode rejection
Variation of Vout versus Vicm
referred to input(2)
2.8V< Vicm < 30V
Tmin < Tamb < Tmax
90 105
dB
SVR
Supply voltage rejection
Variation of Vout versus VCC(3)
4.0V< VCC < 24V
Vsense=30mV
Tmin < Tamb < Tmax
90 105
dB
Vos Input offset voltage(4)
Tamb= 25° C
Tmin < Tamb < Tmax
±0.2 ±1.5
±0.9 ±2.3
mV
dVos/dT Input offset drift vs. T
Tmin < Tamb < Tmax
-3
µV/°C
Ilk
Input leakage current
VCC= 0V
Tmin < Tamb < Tmax
1
µA
Iib
Input bias current
Vsense= 0V
Tmin < Tamb < Tmax
5.5
8
µA
1. Unless otherwise specified, the test conditions are Tamb=25°C, VCC=12V, Vsense=Vp-Vm=50mV, Vm=12V, no load on Out.
2. See Common mode rejection ratio (CMR) on page 11 for the definition of CMR.
3. See Supply voltage rejection ratio (SVR) on page 11 for the definition of SVR.
4. See Gain (Av) and input offset voltage (Vos) on page 11 for the definition of Vos.
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