TMC1103 Ver la hoja de datos (PDF) - Cadeka Microcircuits LLC.

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Fabricante

TMC1103

Triple Video A/D Converter with Clamps 8-Bit, 50Msps

Cadeka Microcircuits LLC. 

PRODUCT SPECIFICATION

TMC1103

Pin Descriptions

Pin Name

A/D Converters

VINA, VINB,

VINC

RTA, RTB, RTC

Pin Number

12, 55, 48

14, 53, 50

RBA, RBB, RBC 15, 52, 51

CLKA, CLKB,

CLKC

DA7-0

9, 58, 45

4, 3, 2, 80, 79,

78, 77, 76

DB7-0

63, 64, 65, 66,

67, 68, 69, 70

DC7-0

41, 40, 39, 38,

37, 36, 35, 34

OEA, OEB, OEC 5, 62, 42

Clamps

VCLPA, VCLPB,

VCLPB

CLPA, CLPB,

CLPC

Power

VDDA

16, 17, 18

28, 29, 30

11, 47, 56

VDD

AGND

6, 7, 27, 28, 29,

30, 43, 44, 60,

61

13, 49, 54

DGND

No Connect

N/C

16, 17, 18, 19,

20, 21, 22, 25,

26, 32, 33, 71,

72, 74, 75

1, 8, 10, 23, 24,

31, 46, 57, 59,

73

Value

RTX to

RBX

2.6V

0.6V

CMOS

CMOS/

TTL

CMOS/

TTL

CMOS/

TTL

CMOS

RTX to

RBX

CMOS

+5V

+5V

0.0V

0.0V

open

Pin Function Description

Analog Inputs. The input voltage conversion range lies between the

voltage applied to the RTX and RBX pins.

Reference Voltage, Top Inputs. DC voltages applied to RTA, RTB

and RTC define highest value of VINX.

Reference Voltage, Bottom Inputs. DC voltages applied to RBA,

RBB and RBC define lowest value of VINX.

Clock Inputs. CMOS-compatible. VINX is sampled on the falling

edge of CLKX.

Data outputs, Converter A (D7 = MSB). Eight-bit CMOS- and

TTL-compatible digital outputs. Valid data is output on the rising

edge of CLKX.

Data outputs, Converter B (D7 = MSB). Eight-bit CMOS- and

TTL-compatible digital outputs. Valid data is output on the rising

edge of CLKX.

Data outputs, Converter C (D7 = MSB). Eight-bit CMOS- and

TTL-compatible digital outputs. Valid data is output on the rising

edge of CLKX.

Output Enable Inputs. CMOS-compatible. When LOW, the A/D

output is enabled. When HIGH, the output is in a high-impedance

state.

Clamp Reference Voltage. One reference for each clamp. A VINX

input is clamped to VCLPX when CLPX is low.

Clamp Pulse Inputs. One input for each A/D clamp. When CLPX is

low, the VINX input is clamped to the VCLPX clamp voltage.

Analog Supply Voltage. +5 Volt power inputs. These should come

from the same power source and be decoupled to AGND.

Digital Supply Voltage. +5 Volt power inputs. These should come

from the same power source and be decoupled to AGND.

Analog Ground. Ground connections. These pins should be

connected to the system analog ground plane.

Digital Ground. Ground connections. These pins should be

connected to the system analog ground plane.

Not Connected.

4

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