DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

SPT8100SIT Ver la hoja de datos (PDF) - Signal Processing Technologies

Número de pieza
componentes Descripción
Fabricante
SPT8100SIT
SPT
Signal Processing Technologies SPT
SPT8100SIT Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
ELECTRICAL SPECIFICATIONS
TA=TMIN to TMAX, AVDD=DVDD=+5.0 V, OVDD= 3.3 V, ƒS=5 MSPS, 2.5 VPP input span, REXT=1.43 k, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
LEVEL
MIN
Dynamic Performance1
Effective Number of Bits
ƒIN = 60 kHz
ƒIN = 900 kHz
Signal-to-Noise Ratio
(without Harmonics)
ƒIN = 75 kHz
ƒIN = 900 kHz
Harmonic Distortion
ƒIN = 60 kHz
ƒIN = 900 kHz
Signal-to-Noise and Distortion
(SINAD)
ƒIN = 60 kHz
ƒIN = 900 kHz
Spurious Free Dynamic Range3
ƒIN = 60 kHz
ƒIN = 900 kHz
ƒIN = 2 MHz
ƒIN = 3 MHz
Two-Tone Intermodulation
3rd Order Distortion
ADC Input = –1 dBFS2
VI
V
ADC Input = –1 dBFS2
VI
V
ADC Input = –0.5 dBFS
V
VI
ADC Input = –1 dBFS
V
VI
ADC Input = –0.5 dB
VI
VI
REXT = 1 k@ 10 MSPS
V
REXT = 1 k@ 10 MSPS
V
ƒ1=400 kHz, ƒ2=410 kHz4 V
ƒ1=890 kHz, ƒ2=900 kHz5 VI
12.2
78
75
85
SPT8100
TYP
13.0
12.7
81
80
–92
–82
80
78
94
94
83
78
–94
–89
MAX UNITS
Bits
Bits
dB
dB
–84 dB
dB
dB
dB
dBc
dBc
dBc
dBc
dB
dB
Inputs
GS0–GS2 Logic 1 Voltage
GS0–GS2 Logic 0 Voltage
CLK, RS Logic 1 Voltage
CLK, RS Logic 0 Voltage
Maximum Input Current Low
Maximum Input Current High
Input Capacitance
VI
2.4
V
VI
0.8 V
VI
2.0
V
VI
0.8 V
VI
–10
+10 µA
VI
–10
+10 µA
V
5
pF
Digital Outputs
Logic 1 Voltage
Logic 0 Voltage
CLK to Output Delay Time (tD)
IOH = –2 mA
IOL = 2 mA
CLOAD = 20 pF
VI ODVDD – 0.5
VI
IV
V
0.4 V
30 ns
Power Supply Requirements
Voltages
ODVDD
AVDD
DVDD
Currents
IDD
Power Dissipation
IV
3.0
IV
4.75
IV
4.75
VI
VI
3.3
5.25 V
5.0
5.25 V
5.0
5.25 V
93
103 mA
465
515 mW
1 Dynamic performance tested at ƒs=4.4 MSPS
2 0 dBFS is 5.0 V peak-to-peak differential
3 ADC Input = –8.1 dBFS, unless otherwise noted
4 Test Conditions: PGA setting of 6 dB; Analog Input at ADC = –0.7 dB
5 Test Conditions: PGA setting of 0 dB; Analog Input at ADC = –1.9 dB
TEST LEVEL CODES
All electrical characteristics are subject
to the following conditions:
All parameters having min/max specifi-
cations are guaranteed. The Test Level
column indicates the specific device
testing actually performed during pro-
duction and Quality Assurance inspec-
tion. Any blank section in the data
column indicates that the specification
is not tested at the specified condition.
TEST LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at TA = +25 °C, and sample tested at the specified
temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characterization
data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25 °C. Parameter is guaranteed over
specified temperature range.
SPT
3
SPT8100
5/12/00

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]