SPT574 Ver la hoja de datos (PDF) - Signal Processing Technologies
Número de pieza
componentes Descripción
Fabricante
SPT574
Signal Processing Technologies
SPT574 Datasheet PDF : 12 Pages
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ELECTRICAL SPECIFICATIONS
TA = TMIN to TMAX, VEE = 0 to +5 V, VDD = +5 V, fS = 40 kHz, fIN = 10 kHz, unless otherwise specified.
PARAMETER
TEST
CONDITIONS
TEST
LEVEL
SPT574C
MIN TYP MAX
AC ELECTRICAL CHARACTERISTICS4
Convert Mode Timing
tDSC STS Delay from CE
tHEC CE Pulse Width
tSSC CS to CE Setup
tHSC CS Low during CE High
tSRC R/C to CE Setup
tHRC R/C Low During CE High
tSAC Ao to CE Setup
tHAC Ao Valid During CE High
tC Conversion Time5
12-Bit Cycle
8-Bit Cycle
VI
60 200
VI
50
30
VI
50
20
VI
50
20
VI
50
0
VI
50
20
VI
0
VI
50
20
VI
22
25
VI
16
18
Read Mode Timing
tDD Access Time from CE
VI
tHD Data Valid After CE Low
VI
tHL Output Float Delay
VI
tSSR CS to CE Setup
VI
tSRR R/C to CE Setup
VI
tSAR Ao to CE Setup
VI
tHSR CS Valid After CE Low
VI
tHRR R/C High After CE Low
VI
tHS STS Delay After Data Valid
VI
tHAR Ao Valid after CE Low
VI
Note 4: Time is measured from 50% level of digital transitions.
Note 5: Includes acquisition time.
75 150
25
35
100 150
50
0
0
50
25
0
0
300 400 1000
50
SPT574B
MIN TYP MAX UNITS
60 200 ns
50
30
ns
50
20
ns
50
20
ns
50
0
ns
50
20
ns
0
ns
50
20
ns
22
25 µs
16
18 µs
75 150 ns
25
35
ns
100 150 ns
50
0
ns
0
ns
50
25
ns
0
ns
0
ns
300 400 1000 ns
50
ns
Figure 1 - Convert Mode Timing Diagram
CE
CS
t SSC
t SRC
R/C
Ao
t SAC
STS
DB11-DB0
t HEC
t HSC
t HRC
t HAC
t DSC
tC
High Impedance
SPT
Figure 2 - Read Mode Timing Diagram
CE
CS
t SSR
t HSR
R/C
Ao
t SRR
t HRR
t SAR
t HAR
STS
DB11-DB0
t HS
HIGH
IMPEDANCE
t DD
DATA
VALID
t HD
t HL
SPT574
4
8/1/00
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