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MGA-86563-BLK Datasheet PDF : 8 Pages
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5
MGA-86563 Applications
Information
Introduction
The MGA-86563 is a high gain,
low noise RF amplifier for use in
wireless RF applications within
the 0.5 to 6 GHz frequency range.
The MGA-86563 is a three-stage,
GaAs Microwave Monolithic
Integrated Circuit (MMIC) ampli-
fier that uses internal feedback to
provide wideband gain and
impedance matching.
A patented, active bias circuit
makes use of current sources to
“re-use” the drain current in all
three stages of gain, thus minimiz-
ing the required supply current
and decreasing sensitivity to
variations in power supply
voltage.
Test Circuit
The circuit shown in Figure 10 is
used for 100% RF testing of Noise
Figure and Gain. The input of this
circuit is fixed tuned for a conju-
gate power match (maximum
power transfer, or, minimum
Input VSWR) at 2 GHz. Tests in
this circuit are used to guarantee
the NFtest and Gtest parameters
shown in the Electrical Specifica-
tions Table.
The parameter test circuit uses a
high impedance RF choke to
apply Vd to the MMIC while
isolating the power supply from
the RF Output of the amplifier.
Phase Reference Planes
The positions of the reference
planes used to measure S-
Parameters and to specify Γopt for
the Noise Parameters are shown
in Figure 11. As seen in the
illustration, the reference planes
are located at the extremities of
the package leads.
Biasing
The MGA-86563 is a voltage-
biased device and operates from
a single +5 volt power supply.
With a typical current drain of
only 14 mA, the MGA-86563 is
suitable for use in battery
powered applications. RF
performance is very stable over a
wide variation of power supply
voltage.
REFERENCE
PLANES
TEST CIRCUIT
The 3.3 nH inductor, L1
(Coilcraft, Cary, IL or equivalent)
in series with the input of the
amplifier matches the input to
50 Ω at 2 GHz.
Figure 11. Reference Planes.
BOARD MATERIAL = 1/16" FR-4
RF
INPUT
L1
3.3 nH
w = 110
(50 Ω)
w = 110
I = 110
w = 15
I = 1000
C1
RFC
(28 nH)
w = 110
(50 Ω)
Vd
RF
OUTPUT
Since DC bias is applied to the
MGA-86563 through the RF
Output pin, some method of
isolating the RF from the DC
must be provided. An RF choke
or length of high impedance
transmission line is typically used
for this purpose.
SOT-363 PCB Layout
A PCB pad layout for the minia-
ture SOT-363 (SC-70) package
used by the MGA-86563 is shown
in Figure 12 (dimensions are in
inches). This layout provides
ample allowance for package
placement by automated
assembly equipment without
adding parasitics that could
impair the high frequency RF
performance of the MGA-86563.
The layout is shown with a
nominal SOT-363 package
footprint superimposed on the
PCB pads.
0.026
0.035
0.075
0.016
Figure 12. PCB Pad Layout
(dimensions in inches).
Figure 10. Test Circuit for 2 GHz.
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