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AN6846

Applying SG6846 to Control a Flyback Power Supply with Surge Current Output

Fairchild Semiconductor 

AN-6846

Leading-Edge Blanking (LEB)

A voltage signal proportional to the MOSFET current

develops on the current-sense resistor RS. Each time the

MOSFET is turned on, a spike induced by the diode reverse

recovery and by the output capacitances of the MOSFET

and diode, appears on the sensed signal. A leading-edge

blanking time (about 360ns) is introduced to avoid

premature termination of the MOSFET by the spike.

Therefore, only a small-value RC filter (e.g. 100Ω + 470pF)

is required between the SENSE pin and RS. A non-inductive

resistor for RS is recommended.

RS

Figure 10.Turn-on Spike

Output Driver / Soft Driving

The output stage is a fast totem-pole gate driver capable of

directly driving external MOSFETs. An internal Zener diode

clamps the driver voltage under 18V to protect MOSFETs

against over voltage. By integrating circuits to control the

slew rate of switch-on rising time, the external resistor RG

may not be necessary to reduce switching noise, thereby

improving EMI performance.

APPLICATION NOTE

As the current-sense signal of the SENSE pin exceeds the

internal limit VSENSE, 0.9V typically, the SG6846 stops the

PWM pulses immediately. The output power of a flyback

power supply in DCM is calculated as:

POUT

=

1

2

⋅

L

⋅

I

2

pk

⋅ fS

⋅η

(7)

where:

L is the inductance;

Ipk is the peak inductor current;

fs is the PWM frequency; and

η is the conversion efficiency.

If the conversion efficiency remains unchanged for a wide

input voltage range, the maximum output power would be

the same for a fixed Ipk, which is limited by the internal

current limiting threshold voltage VTH and RS. However, due

to the time delay from the comparator to output stage inside

the SG6846, the maximum output power with high line input

is always higher than with low line. A 30% error is common

for the universal input voltage range if the converter is

operated in DCM. In CCM operation, the deviation becomes

even worse. For the purpose of constant output power limit,

the peak current limit VTH must be adjustable according to

the input voltage.

In the SG6846, the peak-current threshold is adjusted by the

voltage of the VIN pin for constant output power limit over

universal input-voltage range. Since the VIN pin is

connected to the rectified AC input line voltage through the

resistive divider, a higher line voltage generates a higher VIN

voltage. The threshold voltage decreases as the VIN voltage

increases, making the maximum output power at high line

input voltage equal to that at low line input.

Figure 12.Universal Line Voltage Compensation for

Constant Output Power Limit

Brownout Protection

Figure 11.Gate Driver

Since the VIN pin is connected through a resistive divider to

the rectified AC input line voltage, it can also be used for

brownout protection. If the VIN voltage is less than 0.7V, the

PWM output shuts off. As the VIN voltage reaches 0.9V, the

PWM output is turned on again. The hysteresis window for

on/off is around 0.2V.

Constant Output Power Limit

The maximum output power of a flyback converter can be

designed by the current-sense resistor RS. When the load

increases, the peak inductor current increases accordingly.

The recommended values for R1, R2, and C1 are 2M

(1M+1M), 16.2K, and 4.7µF. Using these values in the

evaluation board, the power supply is turned off at 75V

(max. load) / 64V (min. load) and recovered at 82V.

© 2008 Fairchild Semiconductor Corporation

Rev. 1.3.2 • 9/26/08

5

www.fairchildsemi.com

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