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PI74FCT162952T

16-Bit Registered Transceivers

Pericom Semiconductor 

PI74FCT1695P2IT7/146F29C52T/11662H959522TT

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PI74FCT162H952T

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16-Bit Registered Transceivers

Product Features:

Common Features:

• PI74FCT16952T,PI74FCT162952T,andPI74FCT2H952T

are high-speed,

low power devices with high current drive

• VCC =5V±10%

• Hysteresis on all inputs

• Packages available:

– 56-pin 240 mil wide plastic TSSOP (A)

– 56-pin 300 mil wide plastic SSOP (V)

PI74FCT16952T Features:

• High output drive: IOH = –32 mA; IOL = 64 mA

• Power off disable outputs permit “live insertion”

• Typical VOLP (Output Ground Bounce) < 1.0V

at VCC = 5V, TA = 25°C

PI74FCT162952T Features:

• Balanced output drivers: ±24 mA

• Reduced system switching noise

• Typical VOLP (Output Ground Bounce) < 0.6V

at VCC = 5V, TA = 25°C

PI74FCT162H952T Features:

• Bus Hold retains last active bus state during 3-state

• Eliminates the need for external pull-up resistors

Product Description:

Pericom Semiconductor’s PI74FCT series of logic circuits are pro-

duced in the Company’s advanced 0.6 micron CMOS technology,

achieving industry leading speed grades.

The PI74FCT16952T, PI74FCT162952T, and PI74FCT162H952T

are 16-bit registered transceivers organized with two sets of eight

D-type latches with separate input and output controls for each set.

For data flow from A to B, for example, the A-to-B Enable

(xCEAB) input must be LOW in order to enter data from xAx. The

data present on the A port will be clocked on the B register when

xCLKAB toggles from LOW-to-HIGH. The xOEAB control

performs the output enable function on the B port. Control of data

from B to A is similar, but uses the xCEBA, xCLKBA, and xOEBA

inputs. By connecting the control pins of the two independent

transceivers together, a full 16-bit operation can be achieved. The

output buffers are designed with a Power-Off disable allowing

“live insertion” of boards when used as backplane drivers.

The PI74FCT16952T output buffers are designed with a Power-

Off disable function allowing “live insertion” of boards when used

as backplane drivers.

The PI74FCT162952T has ±24 mA balanced output drivers. It is

designed with current limiting resistors at its outputs to control the

output edge rate resulting in lower ground bounce and undershoot.

This eliminates the need for external terminating resistors for most

interface applications.

The PI74FCT162H952T has “Bus Hold” which retains the input’s

last state whenever the input goes to high-impedance preventing

“floating” inputs and eliminating the need for pull-up/down resistors.

Logic Block Diagram

1OEBA

1CEBA

1CLKBA

1OEAB

1CEAB

2OEBA

2CEBA

2CLKBA

2OEAB

2CEAB

1CLKAB

1A0

C

D

2CLKAB

C

2A0

D

1B0

C

D

C

D

2B0

TO 7 OTHER CHANNELS

1

TO 7 OTHER CHANNELS

PS2042A 03/11/96

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