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S3C4510B Ver la hoja de datos (PDF) - Samsung

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S3C4510B Datasheet PDF : 422 Pages
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S3C4510B
DMA Controller
2-channel General DMA for memory-to-
memory, memory-to-UART, UART-to-memory
data transfers without CPU intervention
Initiated by a software or external DMA request
Increments or decrements a source or
destination address in 8-bit, 16-bit or 32-bit data
transfers
4-data burst mode
UARTs
Two UART (serial I/O) blocks with DMA-based
or interrupt-based operation
Support for 5-bit, 6-bit, 7-bit, or 8-bit serial data
transmit and receive
Programmable baud rates
1 or 2 stop bits
Odd or even parity
Break generation and detection
Parity, overrun, and framing error detection
• ×16 clock mode
Infra-red (IR) Tx/Rx support (IrDA)
Timers
Two programmable 32-bit timers
Interval mode or toggle mode operation
PRODUCT OVERVIEW
Programmable I/O
18 programmable I/O ports
Pins individually configurable to input, output, or
I/O mode for dedicated signals
Interrupt Controller
21 interrupt sources, including 4 external
interrupt sources
Normal or fast interrupt mode (IRQ, FIQ)
Prioritized interrupt handling
PLL
The external clock can be multiplied by on-chip
PLL to provide high frequency system clock
The input frequency range is 10–40 MHz
The output frequency is 5 times of input clock.
To get 50 MHz, input clock frequency should be
10 MHz.
Operating Voltage Range
3.3 V ± 5 %
Operating Temperature Range
0 °C to + 70 °C
Operating Frequency
Up to 50 MHz
Package Type
208-Pin QFP
1-3

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