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RMBA09501 Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
RMBA09501
Fairchild
Fairchild Semiconductor Fairchild
RMBA09501 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Figure 4. Layout of Test Evaluation Board (RMBA09501-TD, G657471)
Test Procedure for the Evaluation Board (RMBA09501-TB)
CAUTION: LOSS OF GATE VOLTAGES (VG1, VG2)
WHILE CORRESPONDING DRAIN VOLTAGES (Vdd)
ARE PRESENT CAN DAMAGE THE AMPLIFIER.
The following sequence must be followed to properly test
the amplifier. (It is necessary to add a fan to provide air
cooling across the heat sink of RMBA09501.) Note:
Vdd1, 2 are tied together.
Step 1: Turn off RF input power.
Step 2: Use GND terminal of the evaluation board for the
ground of the DC supplies. Slowly apply gate supply
voltages as specified on results sheet supplied with test
board to the board terminals Vgg1 and Vgg2.
Step 3: Slowly apply drain supply voltages of +7.0V to the
board terminals Vdd1, 2. Adjust Vgg to set the total
quiescent current Idq1 and Idq2 (with no RF applied) Idq
as per supplied result sheet. Gate supply voltages (Vgg
i.e., Vgg1, Vgg2) may be adjusted, only if quiescent
current (Idq1 and Idq2) values desired are different from
those noted on the data summary supplied with product
samples.
Step 4: After the bias condition is established, RF input
signal may now be applied at the appropriate frequency
band and appropriate power level.
Step 5: Follow turn-off sequence of:
(i) Turn off RF Input Power
(ii) Turn down and off drain voltages Vdd1, 2.
(iii) Turn down and off gate voltages Vgg1 and Vgg2.
©2004 Fairchild Semiconductor Corporation
RMBA09501 Rev. C

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