Philips Semiconductors
16-bit D-type transparent latch; 30 Ω series termination
resistors; 5 V tolerant inputs/outputs; 3-state
Product specification
74LVC162373A;
74LVCH162373A
SYMBOL
PARAMETER
CONDITIONS
WAVEFORMS VCC (V)
MIN.
TYP. MAX. UNIT
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay nDn to nQn
see Fig 6 and 10 1.2
−
−
2.7
1.5 −
3.0 to 3.6 1.0 −
−
ns
8.5 ns
7.5 ns
propagation delay nLE to nQn
see Fig 7 and 10 1.2
−
−
−
ns
2.7
1.5 −
3.0 to 3.6 1.5 −
9.0 ns
8.0 ns
tPZH/tPZL 3-state output enable time nOE to nQn see Fig 8 and 10 1.2
−
−
2.7
1.5 −
3.0 to 3.6 1.0 −
−
ns
9.5 ns
8.0 ns
tPHZ/tPLZ 3-state output disable time nOE to nQn see Fig 8 and 10 1.2
−
−
2.7
1.5 −
3.0 to 3.6 1.5 −
−
ns
6.0 ns
6.0 ns
tW
nLE pulse width HIGH
see Fig 7
1.2
−
−
−
ns
2.7
3.0 −
−
ns
3.0 to 3.6 3.0 −
−
ns
tsu
set-up time nDn to nLE
see Fig 9
1.2
−
−
−
ns
2.7
2.0 −
−
ns
3.0 to 3.6 2.0 −
−
ns
th
hold time nDn to nLE
see Fig 9
1.2
−
−
−
ns
2.7
0.9 −
−
ns
3.0 to 3.6 0.9 −
−
ns
tsk(0)
skew
note 3
3.0 to 3.6 −
−
1.5 ns
Notes
1. All typical values are measured at Tamb = 25 °C.
2. Measured at VCC = 3.3 V.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
by design.
2004 Feb 05
10