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OR2C04A Datasheet PDF : 192 Pages
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ORCA Series 2 FPGAs
Data Sheet
January 2002
Interquad Routing (continued)
Subquad Routing (OR2C40A/OR2T40A Only)
In the ORCA OR2C40A/OR2T40A/OR2T40B, each
quadrant of the device is split into smaller arrays of
PLCs called subquads. Each of these subquads is
made of a 4 x 4 array of PLCs (for a total of 16 per sub-
quadrant), except at the outer edges of array, which
have less than 16 PLCs per subquad. New routing
resources, called subquad lines, have been added
between each adjacent pair of subquads to enhance
the routability of the device. A portion of the center of
the OR2C40A and OR2T40A array is shown in Figure
30, including the subquad blocks containing a 4 x 4
array of PLCs, the interquad routing lines, and the sub-
quad routing lines.
All of the inter-PLC routing resources discussed previ-
ously continue to be routed between a PLC and its
adjacent PLC, even if the two adjacent PLCs are in dif-
ferent subquad blocks. Since the PLC routing has not
been modiï¬ed for the OR2C40A/OR2T40A architec-
tures, this means that all of the same routing connec-
tions are possible for these devices as for any other
ORCA 2C series device. In this way, both the
OR2C40A and OR2T40A/OR2T40B are upwardly com-
patible when compared with the ATT2Cxx series
devices. As the inter-PLC routing runs between sub-
quad blocks, it crosses the new subquad lines. When
this happens, CIPs are used to connect the subquad
lines to the X4 and/or the XH lines which lie along the
other axis of the PLC array.
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SEE DETAIL
IN FIGURES 25
AND 26
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
SUBQUAD
(4 x 4 PLCs)
HORIZONTAL
INTERQUAD
ROUTING
(hIQ)
HORIZONTAL
SUBQUAD
ROUTING
(HSUB)
VERTICAL
SUBQUAD
ROUTING
(VSUB)
VERTICAL
INTERQUAD
ROUTING
(vIQ)
5-4200(F).r5
Figure 30. Subquad Blocks and Subquad Routing
34
Lattice Semiconductor
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