MX98745 Ver la hoja de datos (PDF) - Macronix International
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Fabricante
MX98745 Datasheet PDF : 36 Pages
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MX98745
D. Management, 2 pins
PAD # Name
38
MDC
39
MDIO
I/O Description
I,
Management Data Clock. The timing reference for MDIO.
TTL The minumum high and low times are 200 ns each.
I/O, Management Data Input/Output. A bi-directional signal.
TTL The selection of input/output direction is based on IEEE802.3u management
functions (Section 22.2.4).
E. Test/Miscellaneous, 5 pins
PAD #
33
32
34
35
36
31
Name
TEST
TSEL
XCOLED
SCRCTRL
RESETL
IBMON
I/O
I
I
O,
LED
I,
TTL
I,
Sche
I,
TTL
Description
Test. Industrial test pin. Set to 0 for normal operation.
When programmed to logic 1, XRC II is in test mode.
Test Select. Used by industrial test. Internal Pulldown.
Set to 0 for normal operation.
Collision LED. Active low. When there is collision within the XRC II, XCOLED
will be on for 80ms and off for 20ms.
Scrambler Control. Active High. When this pin is set to 0. All TX port will be
set to descramble mode, i.e. contents of register #17 will be disabled. When
this pin is set to 1. Each port's scrambler/descrambler is controller by corre
sponding bit in register #17. Internally pullup.
Reset. Active Low. Will be filtered by LSCLK within the MX98745.
Internal Bus Monitor. In house debugging usage. Internally pull down.
Table 5-1 Pin Description for XRC II (Continued)
P/N:PM0427
REV. 1.4, JUL. 8, 1998
7
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