MX28F1000P Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Fabricante

MX28F1000P

1M-BIT [128K x 8] CMOS FLASH MEMORY

Unspecified 

MX28F1000P

voltages are internally generated in the same manner

as when the standard erase verify command is used.

The Automatic set-up block erase command is a com-

mand only operation that stages the device for auto-

matic electrical erasure of selected blocks in the array.

Automatic set-up block erase is performed by writing

20H to the command register.

To enter automatic block erase, the user must write

the command D0H to the command register. Block

addresses are loaded into internal register on the 2nd

falling edge of WE. Each successive block load cycles,

started by the falling edge of WE, must begin within

30ms from the rising edge of the preceding WE.

Otherwise, the loading period ends and internal auto

block erase cycle starts. When the data on DQ7 is "1"

and the data on DQ6 stops toggling for two

consecutive read cycles, at which time auto erase

ends and the device returns to the Read mode.

Refer to page 2 for detailed block address.

SET-UP AUTOMATIC PROGRAM/PROGRAM

COMMANDS

The Automatic Set-up Program is a command-only

operation that stages the device for automatic pro-

gramming. Automatic Set-up Program is performed by

writing 40H to the command register.

Once the Automatic Set-up Program operation is per-

formed, the next WE pulse causes a transition to an

active programming operation. Addresses are

internally latched on the falling edge of the WE pulse.

Data is internally latched on the rising edge of the WE

pulse. The rising edge of WE also begins the

programming operation. The system is not required to

provide further controls or timings. The device will

automatically provide an adequate internally

generated program pulse and verify margin. The

automatic programming operation is completed when

the data read on DQ6 stops toggling for two

consecutive read cycles and the data on DQ7 and

DQ6 are equivalent to data written to these two bits, at

which time the device returns to the Read mode (no

program verify command is required).

SET-UP CHIP ERASE/ERASE COMMANDS

Set-up Chip Erase is a command-only operation that

stages the device for electrical erasure of all bytes in

the array. The set-up erase operation is performed by

writing 20H to the command register.

To commence chip erasure, the erase command (20H)

must again be written to the register. The erase

operation begins with the rising edge of the WE pulse.

This two-step sequence of set-up followed by execu-

tion ensures that memory contents are not accidentally

erased. Also, chip-erasure can only occur when high

voltage is applied to the VPP pin. In the absence of this

high voltage, memory contents are protected against

erasure.

SET-UP BLOCK ERASE/ERASE COMMANDS

Set-up Block Erase is a command-only operation that

stages the device for electrical erasure of all selected

block(s) in the array. The set-up erase operation is

performed by writing 60H to the command register.

To enter block-erasure, the block erase command 60H

must be written again to the command register. The

block erase mode allows 1 to 8 blocks of the array to be

erased in one internal erase cycle. Internally, there are

8 registers (flags) addressed by A14 to A16. First block

address is loaded into internal registers on the 2-nd

falling of WE. Each successive block load cycles,

started by the falling edge of WE, must begin within

30ms from the rising edge of the preceding WE. Other-

wise, the loading period ends and internal block erase

cycle starts. When the data on DQ7 is "1" at which time

auto erase ends and the device returns to the Read

mode.

ERASE-VERIFY COMMAND

After each erase operation, all bytes must be verified.

The erase verify operation is initiated by writing A0H

into the command register. The address for the byte to

be verified must be supplied as it is latched on the

falling edge of the WE pulse.

P/N: PM0340

REV. 1.6, JAN. 19, 1999

9

Share Link: