MT47H128 Ver la hoja de datos (PDF) - Micron Technology

Número de pieza

componentes Descripción

Fabricante

MT47H128

1Gb: x4, x8, x16 DDR2 SDRAM

Micron Technology 

General Notes

1Gb: x4, x8, x16 DDR2 SDRAM

Functional Description

• The functionality and the timing specifications discussed in this data sheet are for the

DLL-enabled mode of operation.

• Throughout the data sheet, the various figures and text refer to DQs as “DQ.” The DQ

term is to be interpreted as any and all DQ collectively, unless specifically stated oth-

erwise. Additionally, the x16 is divided into 2 bytes: the lower byte and the upper byte.

For the lower byte (DQ[7:0]), DM refers to LDM and DQS refers to LDQS. For the up-

per byte (DQ[15:8]), DM refers to UDM and DQS refers to UDQS.

• A x16 device's DQ bus is comprised of two bytes. If only one of the bytes needs to be

used, use the lower byte for data transfers and terminate the upper byte as noted:

– Connect UDQS to ground via 1kΩ* resistor

– Connect UDQS# to VDD via 1kΩ* resistor

– Connect UDM to VDD via 1kΩ* resistor

– Connect DQ[15:8] individually to either VSS or VDD via 1kΩ* resistors, or float

DQ[15:8].

*If ODT is used, 1kΩ resistor should be changed to 4x that of the selected ODT.

• Complete functionality is described throughout the document, and any page or dia-

gram may have been simplified to convey a topic and may not be inclusive of all re-

quirements.

• Any specific requirement takes precedence over a general statement.

PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. AA 07/14 EN

10

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2007 Micron Technology, Inc. All rights reserved.

Share Link: