MSC1212-01 Ver la hoja de datos (PDF) - Oki Electric Industry

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componentes Descripción

Fabricante

MSC1212-01

48-Bit Grid/Anode Driver

Oki Electric Industry 

¡ Semiconductor

PIN DESCRIPTION

Function

Driver Output

Driver Power Supply

Logic Power Supply

Driver GND

Logic GND

Data Input

Pin

1 to 17

32 to 48

50 to 63

19, 30

27

20, 29

21

22

Clock Input

23

Latch Strobe Input

24

Clear Input

25

Test Input

26

Data Output

28

MSC1212-01

Symbol

HVO1

to

HVO48

VDISP

VCC

D-GND

L-GND

DIN

CLK

LS

CL

CHG

DOUT

Description

Driver output pins, applicable to each bit of shift

register.

Power supply pins for driver circuit. Both Pin 19

and 30 should be connected externally.

Power supply pin for logic.

GND pins for the driver circuit.

Both Pin 20 and 29 should be connected externally.

GND pin for the logic circuit.

Input pin without pull-up or pull-down resistor.

Input pin of shift register. Display data input is

synchronized with clock signal. (positive logic)

Input pin without pull-up or pull-down resistor.

Data of shift register is shifted from one stage to

the next on application of each clock rising edge.

Input pin without pull-up or pull-down resistor.

When LS is at "H" level, the latch is shunted and the

shift register output becomes the lacth output.

When LS is at "L" level, the lacth holds the shift

register output just bafore LS goes to "L" level.

Clear input pin with pull-up resistor. Normally "L"

level. In this condition, driver output changes to "H"

or "L" according to latch output level. When CL is

"H", all driver output pins are fixed to "L".

Test input pin with pull-down resistor. Normally "L"

level, but here, if CL="H", then driver output changes

to "H" or "L" according to latch output level.

If CL = "L" when CHG is at "H" level, all driver output

is fixed to "H" for test.

Serial output pin of shift register.

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