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MP55C

PENTIUM® PROCESSOR P55C VOLTAGE REGULATOR MODULE

Semtech Corporation 

PENTIUM® PROCESSOR P55C

VOLTAGE REGULATOR MODULE

MP55C

October 27, 1997

INPUT AND OUTPUT CONNECTIONS

Pin No. Row A

Row B

1

VSS

2

VSS

3

ND

4

VI/O

5

+3.3V

VSS

VSS

VI/O

VI/O

+3.3V

6

+3.3V

+3.3V

7

VCORE

8

VCORE

9

VSS

10

VCORE

11 PWR GOOD

VCORE

VCORE

VCORE

VCORE

RES

12

SENSE

DISABLE

13

VSS

14

+5.0V

VSS

+5.0V

15

+5.0V

+5.0V

Pin No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

AB

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

VRM

PCB

End view of VRM connector

(viewed from motherboard side)

VOLTAGE REGULATOR MODULE CONNECTOR PIN REFERENCE

Pin Name

+3.3V

+5.0V

VCORE

VI/O

VSS

DISABLE

PWR GOOD

SENSE

RES

ND

I/O

Input

Input

Output

Output

Input

Input

Output

Input

Input

Function

+3.3V Supply

+5.0V Supply

Voltage Regulator Module Output

CPU I/O power connection.

Ground Reference

When driven high, this input will disable the

Voltage Regulator Module output and the

output of the module will float.

Power Good is driven low when the VRM

output is not within valid levels.

Sense is provided for the regulator to correct

for voltage drops across the connector and

motherboard powerplane.

Formerly UPVRM#

Notes

Connected directly to VI/O.

MP55C-3.3: Main Power Input

MP55C-5: Main power input

MP55C-3.3: Bias for regulator control

2.8V output for CPU core

Tied to 3.3V input (VCC3)

Ground

Not connected

Not connected

MP55C-5: Not connected

MP55C-3.3: Connected

Tied to output.

Not connected

© 1997 SEMTECH CORP.

652 MITCHELL ROAD NEWBURY PARK CA 91320

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