MCM69Q536TQ10 Ver la hoja de datos (PDF) - Motorola => Freescale
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MCM69Q536TQ10 Datasheet PDF : 12 Pages
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AC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V ± 5%, TA = 0 to + 70°C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ns
Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . Figure 1 Unless Otherwise Noted
READ/WRITE CYCLE TIMING (See Notes 1, 2, and 3)
MCM69Q536–6
MCM69Q536–8
MCM69Q536–10
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit Notes
Cycle Time
Clock Access Time
tKHKH
12
—
15
—
20
—
ns
1
tKHQV
—
6
—
8
—
10
ns
2
Clock Low Pulse Width
Clock High Pulse Width
tKLKH
4
—
6
—
8
—
ns
tKHKL
4
—
6
—
8
—
ns
Clock High to Data Output Invalid
tKHQX
0
—
0
—
0
—
ns
Clock High to Data Output High–Z
tKHQZ
—
5
—
6
—
7
ns
4
Output Enable to Output Valid
tGLQV
—
6
—
8
—
10
ns
Output Enable to Output Active
tGLQX
0
—
0
—
0
—
ns
4
Output Disable to Output High–Z
tGHQZ
—
5
—
6
—
7
ns
4
Setup Times:
A0 – A15 tAVKH
2.5
—
3
—
3
—
ns
3
W tWVKH
PT tPTVKH
E1, E2 tEVKH
D0 – D17 tDVKH
Hold Times:
A0 – A15 tKHAX
0.5
—
2
—
2
—
ns
3
W tKHWX
PT tKHPTX
E1, E2 tKHEX
D0 – D17 tKHDX
NOTES:
1. All read and write cycles are referenced from K.
2. Valid data from Clock High will be the data stored at the address or the last valid read cycle.
3. This is a synchronous device. All synchronous inputs must meet the specified setup and hold times with stable logic levels for ALL rising
edges of clock (K) while the device is selected.
4. This parameter is sampled and not 100% tested.
OUTPUT
Z0 = 50 Ω
RL = 50 Ω
VL = 1.5 V
Figure 1. AC Test Load
MOTOROLA FAST SRAM
MCM69Q536
7
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