MC10H131
Dual D Type Master-Slave
Flip-Flop
The MC10H131 is a MECL 10H part which is a functional/pinout
duplication of the standard MECL 10K family part, with 100%
improvement in clock speed and propagation delay and no increase in
power–supply current.
• Propagation Delay, 1.0 ns Typical
• Power Dissipation, 235 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
LOGIC DIAGRAM
S1 5
D1 7
CE1 6
Q1
2
Q1
3
R1 4
CC 9
R2 13
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
CE2 11
D2 10
Q2
14
Q2
15
S2 12
RS TRUTH TABLE
CLOCKED TRUTH TABLE
R
S
Qn+1
L
L
Qn
L
H
H
H
L
L
C
D
Qn+1
L
X
Qn
H
L
L
H
H
H
H
H
N.D.
N.D. = Not Defined
C = CE + CC
A clock H is a clock transition
from a low to a high state.
DIP
PIN ASSIGNMENT
VCC1
1
16 VCC2
Q1
2
15 Q2
Q1
3
14 Q2
R1
4
13 R2
S1
5
12 S2
CE1
6
D1
7
11
CE2
10 D2
VEE
8
9
CC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10H131L
AWLYYWW
1
16
MC10H131P
AWLYYWW
1
1
10H131
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10H131L
CDIP–16
25 Units/Rail
MC10H131P
PDIP–16
25 Units/Rail
MC10H131FN PLCC–20
46 Units/Rail
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 6
Publication Order Number:
MC10H131/D