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MAX9235

10-Bit LVDS Serializer

Maxim Integrated 

10-Bit LVDS Serializer

Topologies

The MAX9235 can operate in point-to-point or broad-

cast topologies.

A point-to-point connection terminated at each end in

the characteristic impedance of the cable or PCB

traces is shown in Figure 8. The total load seen by the

serializer is 50Ω. The double termination typically

reduces reflections compared to a single 100Ω termi-

nation. A single 100Ω termination at the deserializer

input is feasible and will make the differential signal

swing larger.

A point-to-point broadcast configuration is shown in

Figure 9. The low-jitter MAX9150 10-port repeater is

used to reproduce and transmit the serializer output

over 10 double-terminated point-to-point links.

The repeater eliminates nine serializers compared to 10

individual point-to-point serializer-to-deserializer con-

nections. Since repeater jitter subtracts from the serial-

izer-deserializer timing margin, a low-jitter repeater is

essential in most high data rate applications.

Board Layout

For LVDS applications, a four-layer PCB that provides

separate power, ground, and input/output signals is

recommended. Separate LVTTL/LVCMOS and LVDS

signals from each other to prevent coupling into the

LVDS lines.

PARALLEL

DATA IN

100Ω

SERIALIZED DATA

100Ω

PARALLEL

DATA OUT

MAX9235

Figure 8. Double-Terminated Point-to-Point

MAX9206

ASIC

ASIC

ASIC

MAX9235

MAX9150

REPEATER

100Ω

100Ω

MAX9206

100Ω

MAX9206

100Ω

100Ω

100Ω

Figure 9. Point-to-Point Broadcast Using MAX9150 Repeater

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