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MAX9205
(Rev.:2001)

10-Bit Bus LVDS Serializers

Maxim Integrated 

10-Bit Bus LVDS Serializers

Topologies

The serializers can operate in a variety of topologies.

Examples of double-terminated point-to-point, mul-

tidrop, point-to-point broadcast, and multipoint topolo-

gies are shown in Figures 11 through 14. Use 1%

surface-mount termination resistors.

A point-to-point connection terminated at each end in

the characteristic impedance of the cable or PC board

traces is shown in Figure 11. The total load seen by the

serializer is 50Ω. The double termination typically

reduces reflections compared to a single 100Ω termi-

nation. A single 100Ω termination at the deserializer

input is feasible and will make the differential signal

swing larger.

A serializer located at one end of a backplane bus dri-

ving multiple deserializers in a multidrop configuration

is shown in Figure 12. A 54Ω resistor at the far end ter-

minates the bus. This topology allows “broadcast” of

data with a minimum of interconnect.

PARALLEL

DATA IN

100Ω

SERIALIZED DATA

100Ω

MAX9205

MAX9207

MAX9206

MAX9208

PARALLEL

DATA OUT

Figure 11. Double-Terminated Point-to-Point

ASIC

ASIC

ASIC

ASIC

ASIC

MAX9205

MAX9207

MAX9206

MAX9208

MAX9206

MAX9208

MAX9206

MAX9208

MAX9206

MAX9208

54Ω

Figure 12. Multidrop

10 ______________________________________________________________________________________

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