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MAX9203 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX9203 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Low Cost, 7ns, Low-Power
Voltage Comparators
Pin Description (continued)
MAX9203
PIN
SO SOT
NAME
FUNCTION
1
8
VCC
Positive Analog Supply
2
7
IN+
Positive Input
3
6
IN-
Negative Input
4
5
VEE
Negative Analog Supply and
Substrate
5
4
LATCH Latch Input
6
3
GND Ground
7
2
OUT
Output
8
1
VDD
Positive Digital Supply
Applications Information
Circuit Layout
Because of the large gain-bandwidth transfer function
of the MAX9201/MAX9202/MAX9203 special precau-
tions must be taken to realize their full high-speed
capability. A printed circuit board with a good, low-
inductance ground plane is mandatory. All decoupling
capacitors (the small 100nF ceramic type is a good
choice) should be mounted as close as possible to the
power-supply pins. Separate decoupling capacitors for
analog VCC and for digital VDD are also recommended.
Close attention should be paid to the bandwidth of the
decoupling and terminating components. Short lead
lengths on the inputs and outputs are essential to avoid
unwanted parasitic feedback around the comparators.
Solder the device directly to the printed circuit board
instead of using a socket.
Input Slew-Rate Requirements
As with all high-speed comparators, the high gain-band-
width product of the MAX9201/MAX9202/ MAX9203 can
create oscillation problems when the input traverses the
linear region. For clean output switching without oscilla-
tion or steps in the output waveform, the input must meet
minimum slew-rate requirements (0.5V/s typ). Oscillation
is largely a function of board layout and of coupled
source impedance and stray input capacitance. Both
poor layout and large source impedance will cause the
part to oscillate and increase the minimum slew-rate
requirement. In some applications, it may be helpful to
apply some positive feedback between the output and
positive input. This pushes the output through the transi-
tion region clearly, but applies a hysteresis in threshold
seen at the input terminals.
TTL Output and Latch Inputs
The comparator TTL output stages are optimized for
driving low-power Schottky TTL with a fan-out of four.
When the latch is connected to a logic high level, the
comparator is transparent and immediately responds to
changes at the input terminals. When the latch is con-
nected to a TTL low level, the comparator output latch-
es (in the same state) the instant that the latch
command is applied, and will not respond to subse-
quent changes at the input. No latch is provided on
the MAX9201.
Typical Power-Supply Alternatives
+10V
+5V
VCC
VDD
OUT
GND
VEE
+5V
VCC
VDD
OUT
GND
VEE
+5V
+5V
VCC
VDD
OUT
GND
VEE
-5V
Figure 1a. Separate Analog Supply,
Common Ground
Figure 1b. Single +5V Supply, Common
Ground
Figure 1c. Split ±5V Supply, Separate
Ground
6 _______________________________________________________________________________________

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