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MAX8649(2009) Ver la hoja de datos (PDF) - Maxim Integrated

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MAX8649 Datasheet PDF : 31 Pages
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1.8A Step-Down Regulator with Differential
Remote Sense in 2mm x 2mm WLP
SYNC
VDD
SCL
SDA
IN1
EN
VID1
VID2
AGND
OSC
CLOCK GEN
I2C INTERFACE
PWM LOGIC
VOLTAGE
VDAC
CONTROL, VREF,
BIAS, ETC.
IN2
LX
PGND
SNS+
SNS-
Figure 1. Block Diagram
Detailed Description
The MAX8649 high-efficiency, 3.25MHz step-down
switching regulator delivers up to 1.8A of output cur-
rent. The device operates from a 2.5V to 5.5V input
voltage range, and the output voltage is I2C program-
mable from 0.75V to 1.38V in 10mV increments. Fully
differential remote sense ensures precise DC regula-
tion at the load. Total output error is less than 2% over
load, line, and temperature.
Dynamic Voltage Scaling
The output voltage is dynamically adjusted by use of
the VID0 and VID1 logic inputs, allowing selection
between four predefined operation modes/voltage
configurations.
For each of the different output modes, the following
parameters are programmable:
• Output voltage from 0.75V to 1.38V in 10mV steps
• Mode of operation: Forced PWM or power save
• Enable/disable of synchronization of switching
frequency to external clock source
The relation between the VID0/VID1 and operation
mode is given by Table 1.
The VID_ inputs have internal pulldown resistors. These
pulldown resistors can be disabled through the CONTROL
register after the MAX8649 is enabled, achieving low-
est possible quiescent current. When EN is low, the
CONTROL register is reset to default, enabling the pull-
down resistors (see Table 7).
Table 1. VID0 and VID1 Configuration
VID0
VID1
MODE
I2C REGISTER
0
0
MODE0
Table 3
0
1
MODE1
Table 4
1
0
MODE2
Table 5
1
1
MODE3
Table 6
DEFAULT
SWITHCING
MODE
FORCED PWM
POWER SAVE
FORCED PWM
FORCED PWM
DEFAULT
SYN C H R O N IZ A TIO N
OFF
OFF
OFF
OFF
DEFAULT
OUTPUT
VOLTAGE (V)
1.27
1.05
1.22
1.05
______________________________________________________________________________________ 11

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