MAX7473 Ver la hoja de datos (PDF) - Minilogic Device Corporation Limited
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MAX7473 Datasheet PDF : 19 Pages
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HDTV Anti-Aliasing Filters with Triple-Input Mux
tion). After receiving the proper address, the
MAX7472/MAX7473 (slave) issue an ACK by pulling
SDA low for one clock cycle.
The MAX7472/MAX7473 slave address consists of 5
fixed bits A6–A2 (set to 10010) followed by 2 pin-pro-
grammable bits A1 and A0. The most significant address
bit (A6) is transmitted first, followed by the remaining
bits. Addresses A1 and A0 can also be driven dynami-
cally if required, but the values must be stable when they
are expected in the address sequence.
Command Byte (Write Cycle)
A write cycle begins with the bus master issuing a
START condition followed by 7 address bits (Figure 5)
and a write bit (R/W = 0). After successfully receiving
its address, the MAX7472/MAX7473 (slave) issue an
ACK. The MAX7472/MAX7473 recognize the next byte
after a successfully received address as the command
byte (Table 3).
Use the command byte to configure the MAX7472/
MAX7473. While most of the commands listed in Table
3 modify the functionality of the MAX7472/
MAX7473, some commands prepare the device for fur-
ther data transfers (see the Control/Status Register,
Frequency Register, and Channel-Selection Register
sections.) When the write cycle is prematurely aborted,
the register is not updated. Figures 6 and 7 show
examples of write sequences.
SDA
1
0
0
MSB
SCL
Figure 5. Slave-Address Byte Definition
1
0
A1
A0
R/W
ACK
LSB
SCL
SDA
SDA
DIRECTION
1
0
0
1
0 A1 A0 R/W ACK 0 0
01
0
0
1
0 ACK
C7 C6 C5 C4 C3 C2 C1 C0
IN TO MAX7472/MAX7473
OUT
IN
OUT
START
SCL (CONT)
SDA (CONT)
F7 F6 F5 F4 F3 F2 F1 F0 ACK
SDA
DIRECTION
IN
OUT IN
COMMAND WORD C7–C0 IS 00010010.
STOP
Figure 6. Write Sequence to Update the Frequency Register
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