MAX7313 Ver la hoja de datos (PDF) - Maxim Integrated
Número de pieza
componentes Descripción
Fabricante
MAX7313
Maxim Integrated
MAX7313 Datasheet PDF : 26 Pages
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16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
QSOP
PIN
TQFN-EP
1
22
21, 2, 3
4–11, 13–20
12
22
23
24
18, 23, 24
1–8, 10–17
9
19
20
21
—
—
Pin Description
NAME
FUNCTION
INT/O16
AD0, AD1,
AD2
P0–P15
GND
SCL
SDA
V+
EP
Output Port. Open-drain output rated at 7V, 50mA. Configurable as interrupt
output or general-purpose output.
Address Inputs. Sets device slave address. Connect to either GND, V+,
SCL, or SDA to give 64 logic combinations. See Table 1.
Input/Output Ports. P0–P15 are open-drain I/Os rated at 5.5V, 50mA.
Ground. Do not sink more than 350mA into the GND pin.
I2C-Compatible Serial Clock Input
I2C-Compatible Serial Data I/O
Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic
capacitor.
Exposed Pad (TQFN only). Internally connected to GND. Connect to a large
analog ground plane to maximize thermal performance. Not intended to use
as an electrical connection point.
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
CONFIGURATION
REGISTER
DQ
FF
CK Q
OUTPUT
PORT
REGISTER
DQ
FF
WRITE PULSE
CK Q
OUTPUT PORT
REGISTER DATA
I/O PIN
Q2
READ PULSE
INPUT PORT
REGISTER
DQ
FF
CK Q
GND
INPUT PORT
REGISTER DATA
TO INT
Figure 1. Simplified Schematic of I/O Ports
Functional Overview
The MAX7313 is a general-purpose input/output (GPIO)
peripheral that provides 16 I/O ports, P0–P15, con-
trolled through an I2C-compatible serial interface. A
17th output-only port, INT/O16, can be configured as
an interrupt output or as a general-purpose output port.
All output ports sink loads up to 50mA connected to
external supplies up to 5.5V, independent of the
MAX7313’s supply voltage. The MAX7313 is rated for a
ground current of 350mA, allowing all 17 outputs to sink
20mA at the same time. Figure 1 shows the output
structure of the MAX7313. The ports default to inputs on
power-up.
Port Inputs and Transition Detection
Input ports registers reflect the incoming logic levels of
the port pins, regardless of whether the pin is defined
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