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MAX7033

315MHz/433MHz ASK Superheterodyne Receiver with AGC Lock

Maxim Integrated 

MAX7033

315MHz/433MHz ASK Superheterodyne

Receiver with AGC Lock

General Description

The MAX7033 fully integrated low-power CMOS super-

heterodyne receiver is ideal for receiving amplitude shift-

keyed (ASK) data in the 300MHz to 450MHz frequency

range. The receiver has an RF input signal range of

-114dBm to 0dBm. With few external components and a

low-current power-down mode, it is ideal for cost-sensitive

and power-sensitive applications typical in consumer

markets. The MAX7033 consists of a low-noise ampli-

fier (LNA), a fully differential image-rejection mixer, an

on-chip phase-locked loop (PLL) with integrated voltage-

controlled oscillator (VCO), a 10.7MHz IF limiting amplifier

stage with received-signal-strength indicator (RSSI), and

analog baseband data-recovery circuitry. The MAX7033

also has a discrete one-step automatic gain control

(AGC) that reduces the LNA gain by 35dB when the RF

input signal exceeds -62dBm. The AGC circuitry offers an

externally controlled hold feature.

The MAX7033 is available in 28-pin TSSOP and 32-pin

TQFN packages and is specified over the extended

(-40°C to +105°C) temperature range.

Applications

●● Security Systems

●● Garage Door Openers

●● Home Automation

●● Remote Controls

●● Local Telemetry

●● Wireless Sensors

Pin Configurations

TOP VIEW

+

XTAL1 1

AVDD 2

LNAIN 3

LNASRC 4

AGND 5

LNAOUT 6

MAX7033

AVDD 7

MIXIN1 8

MIXIN2 9

AGND 10

IRSEL 11

MIXOUT 12

DGND 13

DVDD 14

TSSOP

28 XTAL2

27 SHDN

26 PDOUT

25 DATAOUT

24 VDD5

23 DSP

22 DFFB

21 OPP

20 DSN

19 DFO

18 IFIN2

17 IFIN1

16 XTALSEL

15 AC

Features

●● Optimized for 315MHz or 433MHz Band

●● Operates from Single +3.3V or +5.0V Supplies

●● High Dynamic Range with On-Chip AGC

●● AGC Hold Circuit

●● 1ms AGC Release Time

●● Selectable Image-Rejection Center Frequency

●● Selectable x64 or x32 fLO/fXTAL Ratio

●● Low 5.2mA Operating Supply Current

●● < 3.5μA Low-Current Power-Down Mode for Efficient

Power Cycling

●● 250μs Startup Time

●● Built-In 44dB RF Image Rejection

●● Better than -114dBm Receive Sensitivity

●● -40°C to +105°C Operation

Ordering Information

PART

TEMP RANGE PIN-PACKAGE

MAX7033EUI+ -40°C to +105°C 28 TSSOP

MAX7033ETJ+ -40°C to +105°C 32 TQFN-EP*

+Denotes a lead(Pb)-free/RoHS-compliant package.

*EP = Exposed pad.

Typical Application Circuit appears at end of data sheet.

N.C. 1

+

AGND 2

LNAOUT 3

AVDD 4

MIXIN1 5

MIXIN2 6

AGND 7

IRSEL 8

MAX7033

24 DATAOUT

23 VDD5

22 DSP

21 N.C.

20 DFFB

19 OPP

18 DSN

17 DFO

TQFN

19-3273; Rev 4; 4/14

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