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MAX7032 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX7032 Datasheet PDF : 32 Pages
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Low-Cost, Crystal-Based, Programmable,
ASK/FSK Transceiver with Fractional-N PLL
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VPAVDD = VHVIN = +2.1V to +3.6V, fRF = 300MHz to 450MHz,
TA = -40°C to +125°C, unless otherwise noted. Typical values are at VPAVDD = VAVDD = VDVDD = VHVIN = +2.7V, TA = +25°C, unless
otherwise noted.) (Note 1)
PARAMETER
Gain
FSK DEMODULATOR
Conversion Gain
ANALOG BASEBAND
Maximum Data Filter Bandwidth
Maximum Data Slicer Bandwidth
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
15
mV/dB
2.0
mV/kHz
50
kHz
100
kHz
Maximum Peak Detector
Bandwidth
50
kHz
Maximum Data Rate
Manchester coded
NRZ
CRYSTAL OSCILLATOR
Crystal Frequency
fXTAL
Frequency Pulling by VDD
Crystal Load Capacitance
(Note 7)
SERIAL INTERFACE TIMING CHARACTERISTICS (see Figure 7)
33
66
(fRF - 10.7)/24
2
4.5
kbps
MHz
ppm/V
pF
Minimum SCLK Setup to Falling
Edge of CS
Minimum CS Falling Edge to
SCLK Rising-Edge Setup Time
Minimum CS Idle Time
Minimum CS Period
Maximum SCLK Falling Edge to
Data Valid Delay
tSC
tCSS
tCSI
tCS
tDO
30
ns
30
ns
125
ns
2.125
µs
80
ns
Minimum Data Valid to SCLK
Rising-Edge Setup Time
tDS
30
ns
Minimum Data Valid to SCLK
Rising-Edge Hold Time
tDH
30
ns
Minimum SCLK High Pulse Width
Minimum SCLK Low Pulse Width
Minimum CS Rising Edge to
SCLK Rising-Edge Hold Time
Maximum CS Falling Edge to
Output Enable Time
Maximum CS Rising Edge to
Output Disable Time
tCH
tCL
tCSH
tDV
tTR
100
ns
100
ns
30
ns
25
ns
25
ns
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