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MAX5423ETA Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX5423ETA Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
256-Tap, Nonvolatile, SPI-Interface,
Digital Potentiometers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40°C to +85°C. Typical values are at VDD = +5.0V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
DIGITAL INPUTS (CS, DIN, SCLK)
Input High Voltage (Note 4)
VIH
CONDITIONS
VDD = 3.4V to 5.25V
VDD < 3.4V
MIN TYP MAX UNITS
2.4
0.7 x
V
VDD
Input Low Voltage
VIL
VDD = 2.7V to 5.25V (Note 4)
0.8
V
Input Leakage Current
IIN
Input Capacitance
CIN
DYNAMIC CHARACTERISTICS
Wiper -3dB Bandwidth (Note 5)
NONVOLATILE MEMORY RELIABILITY
Data Retention
Endurance
POWER SUPPLY
Supply Voltage
VDD
Standby Current
IDD
Programming Current
IPG
MAX5422
MAX5423
MAX5424
TA = +85°C
TA = +25°C
TA = +85°C
Digital inputs = VDD or GND, TA = +25°C
During nonvolatile write to memory; digital
inputs = VDD or GND (Note 6)
±0.1
±1
µA
5
pF
100
50
kHz
25
50
200,000
50,000
Years
Stores
2.70
5.25
V
0.5
1
µA
200
400
µA
TIMING CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40°C to +85°C. Typical values are at VDD = +5.0V, TA = +25°C, unless otherwise
noted. See Figure 1.) (Note 7)
PARAMETER
ANALOG SECTION
Wiper Settling Time (Note 8)
DIGITAL SECTION
SCLK Frequency
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup
SCLK Rise to CS Rise Hold
DIN to SCLK Setup
SYMBOL
CONDITIONS
MAX5422
tS
MAX5423
MAX5424
fSCLK
tCP
tCH
tCL
tCSS
tCSH
tDS
MIN TYP MAX UNITS
400
600
ns
1000
5
MHz
200
ns
80
ns
80
ns
80
ns
0
ns
50
ns
_______________________________________________________________________________________ 3

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