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MAX470 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX470 Datasheet PDF : 16 Pages
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Two-Channel, Triple/Quad
RGB Video Switches and Buffers
MAX468 (NO ISOLATION RESISTOR)
MAX468 (WITH ISOLATION RESISTOR)
A
A
GND
GND
GND
B
GND
B
CLOAD = 100pF
A: VIN, 500mV/div
B: VOUT, 500mV/div
1µs/div
Figure 3b. Step Response without an Isolation Resistor
1µs/div
CLOAD = 100pF, RISOLATION = 12
A: VIN, 500mV/div
B: VOUT, 500mV/div
Figure 3c. Step Response with an Isolation Resistor
Digital Interface
The MAX463–MAX466 multiplexer architecture provides
an input transistor buffer, ensuring that no input chan-
nels are ever connected together. Select a channel by
changing A0's
for channel B)
state (A0 =
and pulsing
0C—Sf–orlocwha(sneneelTAa,balensd1Aa0,
=1
1b).
Figure 4 shows the logic timing diagram.
WenhaebnletshetheenMabAlXe4i6n3p–uOMt u(AE—tXpN–4u)6ti6sDadismraivpbellinefiet(roMoaAuXtTpT4uL6ts3l.owMWAshtXean4te6E—,6N–i)t
is driven high, it disables the amplifier outputs. The
disabled MAX463/MAX464 outputs exhibit a 250k
typical resistance. Because their internal feedback
resistors are required to produce a gain of two, the
MAX465/MAX466 exhibit a 1kdisabled output resis-
tance.
LE determines whether E—N– is latched by C—S– or operates
inainnerdpeceuttpetrdreaenngtdsoispetVnae+trrley.,n.CI—tf;WS–C—ohS–bneecinsceotlohCm—weSe–,lsabrteocthtthuhe-retnlhnaseatcbhE—hliNeg–chiaon,nnpbdturootAtl(h0LfoErrree) ggtihsiisesctteeoE—rrnN–ss-
are latched.
tCS
CS
tSU
tH
A0
EN
OUTPUTS
LE = V+
tSU
tH
tOFF
tSW
tPD
tON
HIGH-Z
Figure 4. Logic Timing Diagram
10 ______________________________________________________________________________________

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