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MAX3991UTG Ver la hoja de datos (PDF) - Maxim Integrated

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MAX3991UTG Datasheet PDF : 12 Pages
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10Gbps Clock and Data Recovery
with Limiting Amplifier
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC..............................................-0.5V to +4.0V
Input Voltage Levels
(SDI+, SDI-, REFCLK+,
REFCLK-) ....................................(VCC - 1.0V) to (VCC + 0.5V)
CML Output Voltage
(SDO+, SDO-, SCLKO+,
SLCKO-) ......................................(VCC - 1.0V) to (VCC + 0.5V)
Voltage at (CFIL, LOL, VTH, POL,
LOS, FCTL1, FCTL2) ..............................-0.5V to (VCC + 0.5V)
Continuous Power Dissipation (TA = +85°C)
24-Pin QFN (derate 20.8mW/°C above +85°C) .........1355mW
Junction Temperature Range ............................-40°C to +150°C
Storage Temperature Range.............…………..-55°C to +150°C
Lead Temperature (soldering, 10s) ..……………………..+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(See Table 1 for operating conditions. Typical values at VCC = +3.3V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
Supply Current
ICC
DATA INPUT SPECIFICATION (SDI±)
Single-Ended Input Resistance
RSE
Differential Input Resistance
RD
Single-Ended Input Resistance
Matching
CONDITIONS
MIN TYP
106
42
50
84
100
0.1GHz to 5.5GHz (Note 1)
12.5
Differential Input Return Loss
SDD11
5.5GHz to 12GHz (Note 1)
6
DC Cancellation Loop Low-
Frequency Cutoff
30
REFERENCE CLOCK SPECIFICATION (REFCLK±)
Single-Ended Input Resisitance
Differential Input Resistance
CML OUTPUT SPECIFICATION (SDO±)
SDO± Differential Output Swing
(Note 2)
84
100
168
200
575
650
SDO± Output Common-Mode
Voltage
SCLKO± Differential Output
Single-Ended Output Resistance
Differential Output Resistance
Single-Ended Output Resistance
Matching
RL = 50to VCC
RO
VCC -
0.16
380
42
50
84
100
Differential Output Return Loss
Common-Mode Output Return
Rise/Fall Time
Output AC Common Mode
Power-Down Assert Time
SDD22
SCC22
0.1GHz to 5.5GHz (Note 1)
5.5GHz to 12GHz (Note 1)
0.1GHz to 15GHz (Note 1)
(20% to 80%) (Note 2)
(Note 2)
(Note 3)
13
8
5
18
23
MAX
140
UNITS
mA
58
116
±5
%
dB
kHz
116
232
725 mVP-P
V
mVP-P
58
116
±5
%
dB
dB
30
ps
10 mVRMS
50
µs
2 _______________________________________________________________________________________

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