MAX17498A Ver la hoja de datos (PDF) - Maxim Integrated
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componentes Descripción
Fabricante
MAX17498A
Maxim Integrated
MAX17498A Datasheet PDF : 20 Pages
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MAX17498A/MAX17498B/MAX17498C
AC-DC and DC-DC Peak Current-Mode Converters
for Flyback/Boost Applications
Pin Configuration
TOP VIEW
12 11 10 9
PGOOD 13
PGND 14
LX 15
MAX17498A
MAX17498B
MAX17498C
IN 16
+
EP (SGND)
1
2
3
4
8 SS
7 COMP
6 EA-
5 SLOPE
TQFN-EP
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10, 12
11
NAME
EN/UVLO
VCC
OVI
LIM
SLOPE
EA-
COMP
SS
EA+
N.C.
REF
FUNCTION
Enable/Undervoltage-Lockout Pin. Drive to > 1.23V to start the devices. To externally program the UVLO
threshold of the input supply, connect a resistor-divider between input supply EN/UVLO and SGND.
Linear Regulator Output. Connect input bypass capacitor of at least 1µF from VCC to SGND as close as
possible to the IC.
Overvoltage Comparator Input. Connect a resistor-divider between the input supply (OVI) and SGND to
set the input overvoltage threshold.
Current-Limit Setting Pin. Connect a resistor between LIM and SGND to set the peak-current limit for
nonisolated flyback converter. Peak-current limit defaults to 500mA if unconnected.
Slope Compensation Input Pin. Connect a resistor between SLOPE and SGND to set slope-
compensation ramp. Connect to VCC for minimum slope compensation. See the Programming Slope
Compensation (SLOPE) section.
Inverting Input of the Flexible Error Amplifier. Connect to mid-point of resistor-divider from the positive
terminal output to SGND.
Flexible Error-Amplifier Output. Connect the frequency-compensation network between COMP and
SGND.
Soft-Start Pin. Connect a capacitor from SS to SGND to set the soft-start time interval.
Noninverting Input of the Flexible Error Amplifier. Connect to SS to use 1.22V as the reference.
No Connection
Internal 1.22V Reference Output Pin. Connect a 100pF capacitor from REF to SGND.
Maxim Integrated
8
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