MAX12557 Ver la hoja de datos (PDF) - Maxim Integrated
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MAX12557 Datasheet PDF : 28 Pages
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Dual, 65Msps, 14-Bit, IF/Baseband ADC
Typical Operating Characteristics (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference mode), CL ≈ 5pF at digital outputs, VIN = -0.5dBFS,
DIFFCLK/SECLK = OVDD, PD = GND, G/T = GND, fCLK = 65MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)
-THD, SFDR vs. ANALOG SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
85
80
SFDR
75
-THD
70
65
SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 70MHz)
80
SNR
76
72
SINAD
68
64
-THD, SFDR vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 70MHz)
95
SFDR
90
85
80
-THD
75
70
65
60
3.0 3.1 3.2 3.3 3.4 3.5 3.6
VDD (V)
60
1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
OVDD (V)
60
1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
OVDD (V)
SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
75
SNR
72
69
SINAD
66
63
60
1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
OVDD (V)
PDISS, IOVDD (DIGITAL)
vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
80
CL ≈ 5pF
70
60
50
PDISS (DIGITAL)
40
-THD, SFDR vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
80
SFDR
76
72
-THD
68
64
60
1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
OVDD (V)
SNR, SINAD vs. CLOCK DUTY CYCLE
(fIN = 70MHz, AIN = -0.5dBFS)
72
SNR
70
68
SINAD
66
PDISS, IVDD (ANALOG) vs. ANALOG SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
900
800
PDISS (ANALOG)
700
600
500
400
300
IVDD
200
100
0
3.0 3.1 3.2 3.3 3.4 3.5 3.6
VDD (V)
-THD, SFDR vs. CLOCK DUTY CYCLE
(fIN = 70MHz, AIN = -0.5dBFS)
90
SFDR
85
80
-THD
75
30
IOVDD
20
10
0
1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
OVDD (V)
64
62
60
25
SINGLE-ENDED CLOCK DRIVE
35
45
55
65
75
CLOCK DUTY CYCLE (%)
70
65
60
25
SINGLE-ENDED CLOCK DRIVE
35
45
55
65
75
CLOCK DUTY CYCLE (%)
10 ______________________________________________________________________________________
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