MAX1231(2003) Ver la hoja de datos (PDF) - Maxim Integrated
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componentes Descripción
Fabricante
MAX1231 Datasheet PDF : 24 Pages
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12-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
TIMING CHARACTERISTICS (Figure 1)
PARAMETER
SCLK Clock Period
SCLK Duty Cycle
SCLK Fall to DOUT Transition
CS Rise to DOUT Disable
CS Fall to DOUT Enable
DIN to SCLK Rise Setup
SCLK Rise to DIN Hold
CS to SCLK Rise Setup
SCLK Rise to CS Hold
CNVST Pulse Width
SYMBOL
tCP
tCH
tDOT
tDOD
tDOE
tDS
tDH
tCSS
tCSH
tCSW
CONDITIONS
Externally clocked conversion
Data I/O
CLOAD = 30pF
CLOAD = 30pF
CLOAD = 30pF
CKSEL = 00, CKSEL = 01 (temp sense)
CKSEL = 01 (voltage conversion)
MIN TYP MAX UNITS
208
ns
100
40
60
%
40
ns
40
ns
40
ns
40
ns
0
ns
40
ns
0
ns
40
ns
1.4
µs
CS or CNVST Rise to EOC
Low (Note 9)
tTS
Temp sense
Voltage conversion
Reference power-up
55
7
µs
65
Note 9: This time is defined as the number of clock cycles needed for conversion multiplied by the clock period. If the internal refer-
ence needs to be powered up, the total time is additive. The internal reference is always used for temperature measure-
ments.
Typical Operating Characteristics
(VDD = +3V, VREF = +2.5V, fSCLK = 4.8MHz, CLOAD = 30pF, TA = +25°C, unless otherwise noted.)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
1024
2048
3072
4096
OUTPUT CODE
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
1024
2048
3072
4096
OUTPUT CODE
100
90
80
70
60
50
40
30
20
10
0
0.1
SINAD vs. FREQUENCY
1
10
100
1000
FREQUENCY (kHz)
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