MAX1230 Ver la hoja de datos (PDF) - Maxim Integrated
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MAX1230 Datasheet PDF : 23 Pages
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12-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
TIMING CHARACTERISTICS (Figure 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Externally clocked conversion
208
SCLK Clock Period
tCP
Data I/O
ns
100
SCLK Duty Cycle
tCH
40
60
%
SCLK Fall to DOUT Transition
CS Rise to DOUT Disable
CS Fall to DOUT Enable
DIN to SCLK Rise Setup
tDOT
tDOD
tDOE
tDS
CLOAD = 30pF
CLOAD = 30pF
CLOAD = 30pF
40
ns
40
ns
40
ns
40
ns
SCLK Rise to DIN Hold
CS Fall to SCLK Rise Setup Time
CS Fall-to-SCLK Hold Time
CS Rise-to-SCLK Rise Hold Time
CS Rise-to-SCLK Rise Setup Time
tDH
tCSS0
tCSH0
tCSH1
tCSS1
0
ns
40
ns
0
ns
0
4
µs
40
ns
CNVST Pulse Width
CKSEL = 00, CKSEL = 01 (temp sense)
40
tCSW
CKSEL = 01 (voltage conversion)
1.4
ns
µs
CS or CNVST Rise to EOC
Low (Note 10)
tTS
Temp sense
Voltage conversion
tRP
Reference power-up
55
7
µs
65
Note 10: This time is defined as the number of clock cycles needed for conversion multiplied by the clock period. If the internal refer-
ence needs to be powered up, the total time is additive. The internal reference is always used for temperature measurements.
Typical Operating Characteristics
(VDD = +5V, VREF = +4.096V, fSCLK = 4.8MHz, CLOAD = 30pF, TA = +25°C, unless otherwise noted.)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
1024
2048
3072
4096
OUTPUT CODE
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
1024
2048
3072
4096
OUTPUT CODE
100
90
80
70
60
50
40
30
20
10
0
0.1
SINAD vs. FREQUENCY
1
10
100
1000
FREQUENCY (kHz)
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