M5M5V408BFP Ver la hoja de datos (PDF) - Renesas Electronics
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M5M5V408BFP Datasheet PDF : 10 Pages
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rev. 3.0e, Feb. 12, 2001
M5M5V408BFP,TP,KV
MITSUBISHI LSIs
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
AC ELECTRICAL CHARACTERISTICS (Vcc=2.7 ~ 3.6V, unless otherwise noted)
(1) TEST CONDITIONS
Supply v oltage
Input pulse
Input rise time and f all time
2.7V~3.6V
V IH= 2 . 4 V , V IL= 0 . 4 V
5ns
Ref erence lev el
Output loads
V OH=V OL= 1 . 5 V
Transition is measured ±500mV f rom
steady state voltage.(f or ten,t dis)
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
1TTL
DQ
CL
Including scope and
jig capacitance
Fig.1 Output load
(2) READ CYCLE
Symbol
Parameter
tCR
ta(A)
ta(S)
ta(OE)
t dis (S )
tdis(OE)
t en(S )
ten(OE)
tV(A)
Read cy cle time
Address access time
Chip select access time
Output enable access time
Output disable time af t er S# high
Output disable time af t er OE# high
Output enable time af ter S# low
Output enable time af ter OE# low
Data v alid time after address
Limits
-70H, -70HI
-85H, -85HI
Min
Max
70
Min
Max
70
85
70
85
35
45
25
25
25
25
10
10
5
5
10
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
(3) WRITE CYCLE
Symbol
Parameter
tCW
tw(W)
tsu(A)
tsu(A-WH)
tsu(S)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
Write cy cle time
Write pulse width
Address set up time
Address set up time with respect to W# high
Chip select set up time
Data set up time
Data hold time
Write recov ery time
Output disable time af t er W# low
Output disable time af t er OE# high
Output enable time af ter W# high
Output enable time af ter OE# low
Limits
-70H, -70HI
-85H, -85HI
Min
Max
Min
Max
70
85
55
55
0
0
65
65
65
65
35
35
0
0
0
0
25
25
25
25
5
5
5
5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
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