M5M5W816TP-55HI Ver la hoja de datos (PDF) - Renesas Electronics
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M5M5W816TP-55HI Datasheet PDF : 10 Pages
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2002.08.30 Ver. 6.1
M5M5W816TP - 55HI, 70HI, 85HI
MITSUBISHI LSIs
8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
POWER DOWN CHARACTERISTICS
(1) ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test conditions
Vcc (PD) Power down supply voltage
VI (BC) Byte control input BC1# & BC2#
VI (S)
Chip select input S#
2.2V < Vcc(PD)
2.0V < Vcc(PD) < 2.2V
2.2V < Vcc(PD)
2.0V < Vcc(PD) < 2.2V
Icc (PD)
Power down
supply c urrent
Vcc=2.0V
(1) S# > Vcc - 0.2V,
other inputs = 0 ~ Vcc
(2) BC1# and BC2# > Vcc - 0.2V
S# < 0.2V
other inputs = 0 ~ Vcc
~ +25°C
~ +40°C
~ +70°C
~ +85°C
Limits
Min
Ty p Max
2.0
2.2
Vcc(PD)
2.2
Vcc(PD)
-
0.1 1.5
-
0.2
3
-
-
15
-
-
30
Units
V
V
V
µA
(2) TIMING REQUIREMENTS
Note 7: Typical parameter of Icc(PD) indicates the value for the
center of distribution at 2.0V, and not 100% tested.
Symbol
Parameter
tsu (PD)
trec (PD)
Power down set up time
Power down recov ery t ime
Test conditions
Limits
Min Ty p Max
0
5
Units
ns
ms
(3) TIMING DIAGRAM
BC# control mode
Vcc
On the BC# control mode, the lev el of S# must be f ixed at S# > Vcc-0.2V or S# < 0.2V.
tsu (PD)
2.7V
2.7V
trec (PD)
BC1#
BC2#
2.2V
BC1# , BC2# > Vcc-0.2V
2.2V
S# control mode
Vcc
2.2V
S#
tsu (PD)
2.7V
2.7V
S# > Vcc-0.2V
trec (PD)
2.2V
8
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