M25P05
MEMORY ORGANIZATION
The memory is organized as:
s 65536 bytes (8 bits each)
s 2 sectors (256 Kbits, 32768 bytes each)
s 512 pages (128 bytes each).
Each page can be individually programmed (bits
are programmed from 1 to 0). The device is Sector
or Bulk Erasable (bits are erased from 0 to 1) but
not Page Erasable.
Table 3. Memory Organization
Sector
Address Range
1
08000h
0FFFFh
0
00000h
07FFFh
Figure 7. Block Diagram
HOLD
W
S
Control Logic
C
D
Q
High Voltage
Generator
I/O Shift Register
Address Register
and Counter
128 Byte
Data Buffer
Status
Register
0FFFFh
08000h
00000h
128 Bytes (Page Size)
X Decoder
0007Fh
AI04039
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