IN74ACT533 Ver la hoja de datos (PDF) - Integral Corp.

Número de pieza

componentes Descripción

Fabricante

IN74ACT533

OCTAL 3-STATE INVERTING TRANSPARENT LATCH High-Speed Silicon-Gate CMOS

Integral Corp. 

IN74ACT533

AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)

Guaranteed Limits

Symbol

Parameter

25 °C

-40°C to

Unit

85°C

Min Max Min Max

tPLH Propagation Delay, Input D to Q (Figure 1) 2.5 10.5 2.0 11.5 ns

tPHL Propagation Delay, Input D to Q (Figure 1) 2.5 10.0 2.0 11.0 ns

tPLH Propagation Delay, Latch Enable to Q 2.5 10.5 2.0 11.5 ns

(Figure 2)

tPHL Propagation Delay, Latch Enable to Q 2.5 10.5 2.0 11.5 ns

(Figure 2)

tPZH Propagation Delay, Output Enable to Q 2.0 10.0 1.5 11.0 ns

(Figure 3)

tPZL Propagation Delay, Output Enable to Q 2.0 10.0 1.5 11.0 ns

(Figure 3)

tPHZ Propagation Delay, Output Enable to Q 2.0 10.0 1.5 11.0 ns

(Figure 3)

tPLZ Propagation Delay, Output Enable to Q 2.0 10.0 1.5 11.0 ns

(Figure 3)

CIN Maximum Input Capacitance

4.5

4.5

pF

CPD Power Dissipation Capacitance

Typical @25°C,VCC=5.0 V

40

pF

TIMING REQUIREMENTS(VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=3.0 ns)

Guaranteed Limits

Symbol

Parameter

25 °C

-40°C to Unit

85°C

tsu Minimum Setup Time, Input D to Latch

3.0

Enable (Figure 4)

4.0

ns

th Minimum Hold Time, Latch Enable to

2.0

Input D (Figure 4)

2.5

ns

tw Minimum Pulse Width, Latch Enable

5.0

(Figure 2)

6.0

ns

4

Share Link: