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AD7849AN

Serial Input, 14-Bit/16-Bit DAC

Analog Devices 

AD7849

CIRCUIT DESCRIPTION

D/A CONVERSION

Figure 10 shows the D/A section of the AD7849. There are

three on-chip DACs each of which has its own buffer amplifier.

DAC1 and DAC2 are 4-bit DACs. They share a 16-resistor

string but have their own analog multiplexers. The voltage ref-

erence is applied to the resistor string. DAC3 is a 12-bit voltage

mode DAC with its own output stage.

The 4 MSBs of the 16-bit digital input code drive DAC1 and

DAC2 while the 12 LSBs control DAC3. Using DAC1 and

DAC2, the MSBs select a pair of adjacent nodes on the resistor

string and present that voltage to the positive and negative

inputs of DAC3. This DAC interpolates between these two

voltages to produce the analog output voltage.

To prevent nonmonotonicity in the DAC due to amplifier offset

voltages, DAC1 and DAC2 “leap-frog” along the resistor string.

For example, when switching from Segment 1 to Segment 2,

DAC1 switches from the bottom of Segment 1 to the top of

Segment 2 while DAC 2 remains connected to the top of Seg-

ment 1. The code driving DAC3 is automatically comple-

mented to compensate for the inversion of its inputs. This

means that any linearity effects due to amplifier offset voltages

remain unchanged when switching from one segment to the

next and 16-bit monotonicity is ensured if DAC3 is monotonic.

So, 12-bit resistor matching in DAC3 guarantees overall 16-bit

monotonicity. This is much more achievable than the 16-bit

matching which a conventional R-2R structure would have

needed.

Output Stage

The output stage of the AD7849 is shown in Figure 11. It is ca-

pable of driving a load of 2 kΩ in parallel with 200 pF. The

feedback and offset resistors allow the output stage to be config-

ured for gains of 1 or 2. Additionally, the offset resistor may be

used to shift the output range.

The AD7849 has a special feature to ensure output stability

during power-up and power-down sequences. This is specifi-

cally available for control applications where actuators must not

be allowed to move in an uncontrolled fashion.

ROFS

R

10kΩ

R

10kΩ

G3

RSTIN

C1

G1

DAC 3

ONE-SHOT

LOGIC

G2

CIRCUITRY

LDAC

VOLTAGE

MONITOR

VOUT

AGND

RSTOUT

Figure 11. AD7849 Output Stage

When the supply voltages are changing, the VOUT pin is clamped

to 0 V via a low impedance path . To prevent the output of A3

being shorted to 0 V during this time, transmission gate G1 is

also opened. These conditions are maintained until the power

supplies stabilize and a valid word is written to the DAC regis-

ter. At this time, G2 opens and G1 closes. Both transmission

gates are also externally controllable via the Reset In (RST IN)

control input. For instance, if the RST IN input is driven from a

battery supervisor chip, then on power-off or during a brown-

out, the RST IN input will be driven low to open G1 and close

G2. The DAC has to be reloaded, with RST IN high, to re-en-

able the output. Conversely, the on-chip voltage detector out-

put (RST OUT) is also available to the user to control other

parts of the system.

The AD7849 output buffer is configured as a track-and-hold

amplifier. Although normally tracking its input, this amplifier is

placed in a hold mode for approximately 5 µs after the leading

edge of LDAC. This short state keeps the DAC output at its

previous voltage while the AD7849 is internally changing to its

new value. So, any glitches that occur in the transition are not

seen at the output. In systems where the LDAC is permanently

low, the deglitching will not be in operation.

VREF+

R

DAC 1

R

S1

R

S3

S15

S17

R

R

DB15–DB12

R

VREF –

DAC 2

S2

S4

S14

S16

DB15–DB12

DAC 3

A1

OUTPUT

10-BIT/12-BIT

STAGE

DAC

10/12

A2

Figure 10. AD7849 D/A Conversion

–8–

REV. B

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