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IDT6167LA

CMOS STATIC RAM 16K (16K x 1-BIT)

Integrated Device Technology 

IDT6167SA/LA

CMOS STATIC RAM 16K (16K x 1-BIT)

TIMING WAVEFORM OF READ CYCLE NO. 1(1, 2)

tRC

ADDRESS

DATAOUT

tAA

tOH

PREVIOUS DATAOUT VALID

MILITARY AND COMMERCIAL TEMPERATURE RANGES

DATAOUT VALID

2981 drw 06

TIMING WAVEFORM OF READ CYCLE NO. 2(1, 3)

tRC

CS

HIGH IMPEDANCE

DATAOUT

tACS

tCLZ (4)

tPU

ICC

VCC SUPPLY

CURRENT

ISB

NOTES:

1. WE is HIGH for Read cycle.

2. Device is continuously selected, CS is LOW.

3. Address valid prior to or coincedent with CS transition LOW.

4. Transition is measured ±200mV from steady state.

tCHZ (4)

DATAOUT VALID

HIGH

IMPEDANCE

tPD

2981 drw 07

5.2

6

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