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3130 Datasheet PDF : 15 Pages
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CA3130, CA3130A
SEMICONDUCTOR
November 1996
15MHz, BiMOS Operational Amplifier
with MOSFET Input/CMOS Output
Features
• MOSFET Input Stage Provides:
- Very High ZI = 1.5 T(1.5 x 1012) (Typ)
- Very Low II = 5pA (Typ) at 15V Operation
= 2pA (Typ) at 5V Operation
• Ideal for Single-Supply Applications
• Common-Mode Input-Voltage Range Includes
Negative Supply Rail; Input Terminals can be Swung
0.5V Below Negative Supply Rail
• CMOS Output Stage Permits Signal Swing to Either
(or both) Supply Rails
Applications
• Ground-Referenced Single Supply Amplifiers
• Fast Sample-Hold Amplifiers
• Long-Duration Timers/Monostables
• High-Input-Impedance Comparators
(Ideal Interface with Digital CMOS)
• High-Input-Impedance Wideband Amplifiers
• Voltage Followers (e.g. Follower for Single-Supply D/A
Converter)
• Voltage Regulators (Permits Control of Output Voltage
Down to 0V)
• Peak Detectors
• Single-Supply Full-Wave Precision Rectifiers
• Photo-Diode Sensor Amplifiers
Description
CA3130A and CA3130 are op amps that combine the
advantage of both CMOS and bipolar transistors.
Gate-protected P-Channel MOSFET (PMOS) transistors are
used in the input circuit to provide very-high-input
impedance, very-low-input current, and exceptional speed
performance. The use of PMOS transistors in the input stage
results in common-mode input-voltage capability down to
0.5V below the negative-supply terminal, an important
attribute in single-supply applications.
A CMOS transistor-pair, capable of swinging the output volt-
age to within 10mV of either supply-voltage terminal (at very
high values of load impedance), is employed as the output
circuit.
The CA3130 Series circuits operate at supply voltages
ranging from 5V to 16V, (±2.5V to ±8V). They can be phase
compensated with a single external capacitor, and have ter-
minals for adjustment of offset voltage for applications
requiring offset-null capability. Terminal provisions are also
made to permit strobing of the output stage.
The CA3130A offers superior input characteristics over
those of the CA3130.
Pinouts
Ordering Information
CA3131, CA3130A
(PDIP, SOIC)
TOP VIEW
OFFSET
NULL
1
8
INV.
INPUT
2
-
7
NON-INV.
INPUT
3
+
6
V- 4
5
STROBE
V+
OUTPUT
OFFSET
NULL
CA3130, CA3130A
(METAL CAN)
TOP VIEW
PHASE
COMPENSATION TAB
8
OFFSET
NULL
1
INV. 2
INPUT
-
+
STROBE
7 V+
6 OUTPUT
NON-INV. 3
INPUT
5 OFFSET
4
NULL
V- AND CASE
PART NO.
(BRAND)
CA3130AE
CA3130AM
(3130A)
CA3130AM96
(3130A)
CA3130AT
CA3130BT
CA3130E
CA3130M
(3130)
TEMP.
RANGE
(oC)
PACKAGE
-55 to 125 8 Ld PDIP
-55 to 125 8 Ld SOIC
-55 to 125 8 Ld SOIC (Note)
-55 to 125 8 Pin Metal Can
-55 to 125 8 Pin Metal Can
-55 to 125 8 Ld PDIP
-55 to 125 8 Ld SOIC
CA3130M96 -55 to 125 8 Ld SOIC (Note)
(3130)
CA3130T
-55 to 125 8 Pin Metal Can
NOTE: Denotes Tape and Reel.
PKG.
NO.
E8.3
M8.15
M8.15
T8.C
T8.C
E8.3
M8.15
M8.15
T8.C
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1996
3-64
File Number 817.3

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