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EL8103(2004) Ver la hoja de datos (PDF) - Intersil

Número de pieza
componentes Descripción
Fabricante
EL8103
(Rev.:2004)
Intersil
Intersil Intersil
EL8103 Datasheet PDF : 12 Pages
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EL8102, EL8103
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 30 shows a gain of 2 connections for EL8102,
EL8103. Figure 31 shows the complete input video signal
applied at the input, as well as the output signal with the
negative going sync pulse removed.
VIN
75
5V
+ VS+
-
VS-
75
1K
1K
VOUT
75
B
2MHz
1VP-P
75
+2.5V
+
-
-2.5V
1K
75
1K
+2.5V
A
2MHz
2VP-P
75
+
-
-2.5V
1K
1K
ENABLE
VOUT
75
FIGURE 32. TWO TO ONE MULTIPLEXER
FIGURE 30. SYNC PULSE REMOVER
VIN
VOUT
1V
0.5V
0V
1V
0.5V
0V
M = 10µs/DIV
FIGURE 31. VIDEO SIGNAL
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8102 can be used for multiplexing applications. Figure
32 shows two EL8102 with the outputs tied together, driving
a back terminated 75video load. A 2VP-P 2MHz sine wave
is applied to Amp A and a 1VP-P 2MHz sine wave is applied
to Amp B. Figure 33 shows the ENABLE signal and the
resulting output waveform at VOUT. Observe the break-
before-make operation of the multiplexing. Amp A is on and
VIN1 is passed through to the output when the ENABLE
signal is low and turns off in about 25ns when the ENABLE
signal is high. About 200ns later, Amp B turns on and VIN2 is
passed through to the output. The break-before-make
operation ensures that more than one amplifier isn’t trying to
drive the bus at the same time.
ENABLE
A
0V
-0.5V
-1.5V
-2.5V
1V
0V
B
-1V
M = 50ns/DIV
FIGURE 33.
SINGLE SUPPLY VIDEO LINE DRIVER
The EL8102 and EL8103 are wideband rail-to-rail output op
amplifiers with large output current, excellent dG, dP, and low
distortion that allow them to drive video signals in low supply
applications. Figure 34 is the single supply non-inverting
video line driver configuration and Figure 35 is the inverting
video ling driver configuration. The signal is AC coupled by
C1. R1 and R2 are used to level shift the input and output to
provide the largest output swing. RF and RG set the AC gain.
C2 isolates the virtual ground potential. RT and R3 are the
termination resistors for the line. C1, C2 and C3 are selected
big enough to minimize the droop of the luminance signal.
11

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