CXD2585Q Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza

componentes Descripción

Fabricante

CXD2585Q

CD Digital Signal Processor with Built-in Digital Servo

Sony Semiconductor 

(3) SCLK pin

XLAT

tDLS

tSPW

SCLK

Serial Read Out Data

(SENS)

•••

1/fSCLK

MSB

•••

Item

SCLK frequency

SCLK pulse width

Delay time

Symbol

fSCLK

tSPW

tDLS

Min.

31.3

15

Typ.

Max.

16

Unit

MHz

ns

µs

CXD2585Q

LSB

(4) COUT, MIRR and DFCT pins

Operating frequency

(VDD = AVDD = 5.0V ± 5%, VSS = AVSS = 0V, Topr = –20 to +75°C)

Signal

Symbol Min.

Typ. Max. Unit Conditions

COUT maximum operating frequency fCOUT

40

MIRR maximum operating frequency fMIRR

40

DFCT maximum operating frequency fDFCTH

5

kHz

∗1

kHz

∗2

kHz

∗3

∗1 When using a high-speed traverse TZC.

∗2

B

A

When the RF signal continuously satisfies the following conditions during the above traverse.

• A = 0.12VDD to 0.26VDD

•

B

A+B

≤

25%

∗3 During complete RF signal omission.

When settings related to DFCT signal generation are Typ.

– 10 –

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