AT88SC0808C Ver la hoja de datos (PDF) - Atmel Corporation
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AT88SC0808C Datasheet PDF : 18 Pages
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AT88SC0808C
Reset (RST)
Serial Data (SDA/IO)
used, the SCL/CLK input is used to positive edge clock data into the device and nega-
tive edge clock data out of the device.
The AT88SC0808C provides an ISO 7816-3 compliant asynchronous answer to reset
sequence. When the reset sequence is activated, the device will output the data pro-
grammed into the 64-bit answer-to-reset register. An internal pull-up on the RST input
pad allows the device to be used in synchronous mode without bonding RST. The
AT88SC0808C does not support the synchronous answer-to-reset sequence.
The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and
may be wired with any number of other open drain or open collector devices. An exter-
nal pull-up resistor should be connected between SDA and VCC. The value of this
resistor and the system capacitance loading the SDA bus will determine the rise time of
SDA. This rise time will determine the maximum frequency during read operations. Low
value pull-up resistors will allow higher frequency operations while drawing higher aver-
age power. SDA/IO information applies to both asynchronous and synchronous
protocols.
When the synchronous protocol is used, the SCL/CLK input is used to positive edge
clock data into the device and negative edge clock data out of the device.
Table 2. DC Characteristics
Applicable over recommended operating range from VCC = +2.7 to 5.5V, TAC = -40oC to +85oC (unless otherwise noted)
Symbol Parameter
Test Condition
Min
Typ
Max
VCC
Supply Voltage
2.7
5.5
ICC
Supply Current (VCC = 5.5V)
Async READ at 3.57MHz
5
ICC
Supply Current (VCC = 5.5V)
Async WRITE at 3.57MHz
5
ICC
Supply Current (VCC = 5.5V)
Synch READ at 1MHz
5
ICC
Supply Current (VCC = 5.5V)
Synch WRITE at 1MHz
5
ISB
Standby Current (VCC = 5.5V)
VIN = VCC or GND
VIL
SDA/IO Input Low Threshold(1)
VIL
SCL/CLK Input Low Threshold(1)
VIL
RST Input Low Threshold(1)
VIH
SDA/IO Input High Threshold(1)
VIH
SCL/CLK Input High Threshold(1)
VIH
RST Input High Threshold(1)
0
0
0
VCC x 0.7
VCC x 0.7
VCC x 0.7
100
VCC x 0.2
VCC x 0.2
VCC x 0.2
VCC
VCC
VCC
IIL
SDA/IO Input Low Current
0 < VIL < VCC x 0.15
15
IIL
SCL/CLK Input Low Current
0 < VIL < VCC x 0.15
15
IIL
RST Input Low Current
0 < VIL < VCC x 0.15
50
IIH
SDA/IO Input High Current
VCC x 0.7 < VIH < VCC
20
IIH
SCL/CLK Input High Current
VCC x 0.7 < VIH < VCC
100
IIH
RST Input High Current
VCC x 0.7 < VIH < VCC
150
VOH
SDA/IO Output High Voltage
20K ohm external pull-up
VCC x 0.7
VCC
VOL
SDA/IO Output Low Voltage
IOL = 1mA
0
VCC x 0.15
IOH
SDA/IO Output High Current
VOH
20
Note: 1. VIL min and VIH max are reference only and are not tested.
Units
V
mA
mA
mA
mA
uA
V
V
V
V
V
V
uA
uA
uA
uA
uA
uA
V
V
uA
3
2024HS–SMEM–04/07
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